MC908GZ60CFJE Freescale Semiconductor, MC908GZ60CFJE Datasheet - Page 147

IC MCU 60K FLASH 8MHZ 32-LQFP

MC908GZ60CFJE

Manufacturer Part Number
MC908GZ60CFJE
Description
IC MCU 60K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908GZ60CFJE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
CAN, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GZ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
CAN, ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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MSCAN08 bus activity can wake the MCU from CPU stop/MSCAN08 power-down mode. However, until
the oscillator starts up and synchronization is achieved the MSCAN08 will not respond to incoming data.
12.8.4 CPU Wait Mode
The MSCAN08 module remains active during CPU wait mode. The MSCAN08 will stay synchronized to
the CAN bus and generates transmit, receive, and error interrupts to the CPU, if enabled. Any such
interrupt will bring the MCU out of wait mode.
12.8.5 Programmable Wakeup Function
The MSCAN08 can be programmed to apply a low-pass filter function to the CAN
internal sleep mode (see information on control bit WUPM in
1). This feature can be used to protect the MSCAN08 from wakeup due to short glitches on the CAN bus
lines. Such glitches can result from electromagnetic inference within noisy environments.
12.9 Timer Link
The MSCAN08 will generate a timer signal whenever a valid frame has been received. Because the CAN
specification defines a frame to be valid if no errors occurred before the EOF field has been transmitted
successfully, the timer signal will be generated right after the EOF. A pulse of one bit time is generated.
As the MSCAN08 receiver engine also receives the frames being sent by itself, a timer signal also will be
generated after a successful transmission.
The previously described timer signal can be routed into the on-chip timer interface module (TIM). This
signal is connected to channel 0 of timer interface module 1 (TIM1) under the control of the timer link
enable (TLNKEN) bit in CMCR0.
After timer n has been programmed to capture rising edge events, it can be used under software control
to generate 16-bit time stamps which can be stored with the received message.
12.10 Clock System
Figure 12-8
clock generation module (CGM). With this flexible clocking scheme the MSCAN08 is able to handle CAN
bus rates ranging from 10 kbps up to 1 Mbps.
The clock source bit (CLKSRC) in the MSCAN08 module control register (CMCR1) (see
MSCAN08 Module Control Register
crystal oscillator or to the PLL output.
The clock source has to be chosen such that the tight oscillator tolerance requirements (up to 0.4%) of
the CAN protocol are met.
Freescale Semiconductor
shows the structure of the MSCAN08 clock generation circuitry and its interaction with the
If the system clock is generated from a PLL, it is recommended to select the
crystal clock source rather than the system clock source due to jitter
considerations, especially at faster CAN bus rates.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
0) defines whether the MSCAN08 is connected to the output of the
NOTE
12.13.2 MSCAN08 Module Control Register
RX
input line while in
12.13.1
Timer Link
147

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