MC908GZ60CFJE Freescale Semiconductor, MC908GZ60CFJE Datasheet - Page 182

• Manufacturer Part Number: MC908GZ60CFJE
• Description: IC MCU 60K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GZ60CFJE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: CAN, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Input/Output (I/O) Ports
When bit DDRDx is a 1, reading address $0003 reads the PTDx data latch. When bit DDRDx is a 0,
reading address $0003 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
13.6.3 Port D Input Pullup Enable Register
The port D input pullup enable register (PTDPUE) contains a software configurable pullup device for each
of the eight port D pins. Each bit is individually configurable and requires that the data direction register,
DDRD, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRD is configured for output mode.
182
1. X = Don’t care
2. I/O pin pulled up to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = High imp[edance
PTDPUE
Bit
X
1
0
Address:
DDRD
Reset:
Read:
Write:
Bit
0
0
1
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Figure 13-16. Port D Input Pullup Enable Register (PTDPUE)
DD
PTDPUE7
READ DDRD ($0007)
WRITE DDRD ($0007)
WRITE PTD ($0003)
READ PTD ($0003)
$000F
Bit 7
by internal pullup device.
0
PTD
X
Bit
X
X
(1)
PTDPUE6
6
0
Input, Hi-Z
Input, V
Table 13-5. Port D Pin Functions
RESET
Figure 13-15. Port D I/O Circuit
I/O Pin
Output
Mode
PTDPUE5
DD
(2)
(4)
5
0
Table 13-5
PTDPUE4
Accesses to DDRD
DDRDx
PTDx
DDRD7–DDRD0
DDRD7–DDRD0
DDRD7–DDRD0
4
0
Read/Write
PTDPUE3
summarizes the operation of the port D pins.
3
0
PTDPUEx
PTDPUE2
2
0
PTD7–PTD0
Read
Pin
Pin
PTDPUE1
Accesses to PTD
1
0
V
DD
Freescale Semiconductor
INTERNAL
PULLUP
DEVICE
PTDPUE0
PTDx
Bit 0
0
PTD7–PTD0
PTD7–PTD0
PTD7–PTD0
Write
(3)
(3)