MC908GZ60CFJE Freescale Semiconductor, MC908GZ60CFJE Datasheet - Page 184

IC MCU 60K FLASH 8MHZ 32-LQFP

MC908GZ60CFJE

Manufacturer Part Number
MC908GZ60CFJE
Description
IC MCU 60K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908GZ60CFJE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
CAN, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GZ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
CAN, ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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MC908GZ60CFJE
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Part Number:
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Input/Output (I/O) Ports
13.7.2 Data Direction Register E
Data direction register E (DDRE) determines whether each port E pin is an input or an output. Writing a 1
to a DDRE bit enables the output buffer for the corresponding port E pin; a 0 disables the output buffer.
DDRE5–DDRE0 — Data Direction Register E Bits
Figure 13-19
When bit DDREx is a 1, reading address $0008 reads the PTEx data latch. When bit DDREx is a 0,
reading address $0008 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
184
1. X = Don’t care
2. Hi-Z = High impedance
3. Writing affects data register, but does not affect input.
DDRE
These read/write bits control port E data direction. Reset clears DDRE5–DDRE0, configuring all port
E pins as inputs.
Bit
0
1
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
shows the port E I/O logic.
PTE
X
Address:
Bit
Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
X
(1)
Reset:
Read:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
READ DDRE ($000C)
WRITE DDRE ($000C)
WRITE PTE ($0008)
READ PTE ($0008)
$000C
Bit 7
Input, Hi-Z
0
0
I/O Pin
Output
Mode
Figure 13-18. Data Direction Register E (DDRE)
= Unimplemented
(2)
6
0
0
Table 13-6. Port E Pin Functions
RESET
Figure 13-19. Port E I/O Circuit
DDRE5
5
0
Accesses to DDRE
DDRE5–DDRE0
DDRE5–DDRE0
Table 13-6
Read/Write
NOTE
DDRE4
DDREx
PTEx
4
0
summarizes the operation of the port E pins.
DDRE3
3
0
DDRE2
PTE5–PTE0
2
0
Read
Pin
DDRE1
Accesses to PTE
1
0
Freescale Semiconductor
DDRE0
Bit 0
PTEx
0
PTE5–PTE0
PTE5–PTE0
Write
(3)

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