MC908GZ60CFJE Freescale Semiconductor, MC908GZ60CFJE Datasheet - Page 217

IC MCU 60K FLASH 8MHZ 32-LQFP

MC908GZ60CFJE

Manufacturer Part Number
MC908GZ60CFJE
Description
IC MCU 60K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908GZ60CFJE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
CAN, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GZ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
CAN, ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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14.9 ESCI Arbiter
The ESCI module comprises an arbiter module designed to support software for communication tasks as
bus arbitration, baud rate recovery and break time detection. The arbiter module consists of an 9-bit
counter with 1-bit overflow and control logic. The CPU can control operation mode via the ESCI arbiter
control register (SCIACTL).
14.9.1 ESCI Arbiter Control Register
AM1 and AM0 — Arbiter Mode Select Bits
ALOST — Arbitration Lost Flag
ACLK — Arbiter Counter Clock Select Bit
AFIN— Arbiter Bit Time Measurement Finish Flag
Freescale Semiconductor
These read/write bits select the mode of the arbiter module as shown in
and AM0.
This read-only bit indicates loss of arbitration. Clear ALOST by writing a 0 to AM1. Reset clears
ALOST.
This read/write bit selects the arbiter counter clock source. Reset clears ACLK.
This read-only bit indicates bit time measurement has finished. Clear AFIN by writing any value to
SCIACTL. Reset clears AFIN.
1 = Arbiter counter is clocked with one half of the ESCI input clock generated by the ESCI prescaler
0 = Arbiter counter is clocked with the bus clock divided by four
1 = Bit time measurement has finished
0 = Bit time measurement not yet finished
Address:
For ACLK = 1, the arbiter input clock is driven from the ESCI prescaler. The
prescaler can be clocked by either the bus clock or CGMXCLK depending
on the state of the SCIBDSRC bit in CONFIG2.
Reset:
Read:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Figure 14-19. ESCI Arbiter Control Register (SCIACTL)
$000A
AM1
Bit 7
0
AM[1:0]
Table 14-12. ESCI Arbiter Selectable Modes
0 0
0 1
1 0
1 1
= Unimplemented
ALOST
6
0
AM0
Idle / counter reset
Bit time measurement
Bus arbitration
Reserved / do not use
5
0
NOTE
ACLK
4
0
ESCI Arbiter Mode
AFIN
3
0
ARUN
2
0
Table
AROVFL
1
0
14-12. Reset clears AM1
ARD8
Bit 0
0
ESCI Arbiter
217

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