MC908GZ60CFJE Freescale Semiconductor, MC908GZ60CFJE Datasheet - Page 268

• Manufacturer Part Number: MC908GZ60CFJE
• Description: IC MCU 60K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GZ60CFJE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: CAN, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Timer Interface Module (TIM1)
18.3.4.1 Unbuffered PWM Signal Generation
Any output compare channel can generate unbuffered PWM pulses as described in
Modulation
pulse width value over the old value currently in the TIM1 channel registers.
An unsynchronized write to the TIM1 channel registers to change a pulse width value could cause
incorrect operation for up to two PWM periods. For example, writing a new value before the counter
reaches the old value but after the counter reaches the new value prevents any compare during that PWM
period. Also, using a TIM1 overflow interrupt routine to write a new, smaller pulse width value may cause
the compare to be missed. The TIM1 may pass the new value before it is written to the timer channel
(T1CHxH:T1CHxL) registers.
Use the following methods to synchronize unbuffered changes in the PWM pulse width on channel x:
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When changing to a shorter pulse width, enable channel x output compare interrupts and write the
new value in the output compare interrupt routine. The output compare interrupt occurs at the end
of the current pulse. The interrupt routine has until the end of the PWM period to write the new
value.
When changing to a longer pulse width, enable TIM1 overflow interrupts and write the new value
in the TIM1 overflow interrupt routine. The TIM1 overflow interrupt occurs at the end of the current
PWM period. Writing a larger value in an output compare interrupt routine (at the end of the current
pulse) could cause two output compares to occur in the same PWM period.
POLARITY = 1
POLARITY = 0
(PWM). The pulses are unbuffered because changing the pulse width requires writing the new
(ELSxA = 0)
(ELSxA = 1)
In PWM signal generation, do not program the PWM channel to toggle on
output compare. Toggling on output compare prevents reliable 0% duty
cycle generation and removes the ability of the channel to self-correct in the
event of software error or noise. Toggling on output compare also can
cause incorrect PWM signal generation when changing the PWM pulse
width to a new, much larger value.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
TCHx
TCHx
OVERFLOW
Figure 18-4. PWM Period and Pulse Width
PULSE
WIDTH
PERIOD
COMPARE
OUTPUT
OVERFLOW
NOTE
COMPARE
OUTPUT
OVERFLOW
Freescale Semiconductor
18.3.4 Pulse Width
COMPARE
OUTPUT