MC908GZ60CFJE Freescale Semiconductor, MC908GZ60CFJE Datasheet - Page 91
MC908GZ60CFJE
Manufacturer Part Number
MC908GZ60CFJE
Description
IC MCU 60K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GZ60CFJE.pdf
(352 pages)
Specifications of MC908GZ60CFJE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
CAN, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GZ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
CAN, ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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Chapter 5
Configuration Register (CONFIG)
5.1 Introduction
This section describes the configuration registers, CONFIG1 and CONFIG2. The configuration registers
enable or disable these options:
5.2 Functional Description
The configuration registers are used in the initialization of various options. The configuration registers can
be written once after each reset. All of the configuration register bits are cleared during reset. Since the
various options affect the operation of the microcontroller unit (MCU), it is recommended that these
registers be written immediately after reset. The configuration registers are located at $001E and $001F
and may be read at anytime.
Freescale Semiconductor
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Stop mode recovery time (32 CGMXCLK cycles or 4096 CGMXCLK cycles)
COP timeout period (262,128 or 8176 CGMXCLK cycles)
STOP instruction
Computer operating properly module (COP)
Low-voltage inhibit (LVI) module control and voltage trip point selection
Enable/disable the oscillator (OSC) during stop mode
Enable/disable an extra divide by 128 prescaler in timebase module
Enable for scalable controller area network (MSCAN)
Selectable clockout (MCLK) feature with divide by 1, 2, and 4 of the bus or crystal frequency
Timebase clock select
On a FLASH device, the options except MSCANEN and LVI5OR3 are
one-time writable by the user after each reset. These bits are one-time
writable by the user only after each POR (power-on reset). The CONFIG
registers are not in the FLASH memory but are special registers containing
one-time writable latches after each reset. Upon a reset, the CONFIG
registers default to predetermined settings as shown in
Figure
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
5-2.
NOTE
Figure 5-1
and
91
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