MC908GZ60CFJE Freescale Semiconductor, MC908GZ60CFJE Datasheet - Page 94

• Manufacturer Part Number: MC908GZ60CFJE
• Description: IC MCU 60K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GZ60CFJE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: CAN, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Configuration Register (CONFIG)
LVI5OR3 — LVI 5-V or 3-V Operating Mode Bit
SSREC — Short Stop Recovery Bit
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
94
LVI5OR3 selects the voltage operating mode of the LVI module (see
(LVI)). The voltage mode selected for the LVI should match the operating V
Electrical
SSREC enables the CPU to exit stop mode with a delay of 32 CGMXCLK cycles instead of a
4096-CGMXCLK cycle delay.
The short stop recovery delay can be enabled when using a crystal or resonator and the
OSCENINSTOP bit is set. The short stop recovery delay can be enabled when an external oscillator
is used, regardless of the OSCENINSTOP setting.
The short stop recovery delay must be disabled when the OSCENINSTOP bit is clear and a crystal or
resonator is used.
STOP enables the STOP instruction.
COPD disables the COP module. See
1 = LVI operates in 5-V mode
0 = LVI operates in 3-V mode
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLK cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
Specifications) for the LVI’s voltage trip points for each of the modes.
The LVI5OR3 bit is cleared by a power-on reset (POR) only. Other resets
will leave this bit unaffected.
Exiting stop mode by any reset will result in the long stop recovery.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Chapter 6 Computer Operating Properly (COP)
NOTE
NOTE
Chapter 11 Low-Voltage Inhibit
DD
(see
Freescale Semiconductor
Chapter 21
Module.