MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 135

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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9.8 Programming EEDIVH and EEDIVL Registers
9.8.1 Normal mode
9.8.2 Special mode
MC68HC912DT128A — Rev 4.0
MOTOROLA
CAUTION:
The EEDIVH and EEDIVL registers must be correctly set according to
the oscillator frequency before any EEPROM location can be
programmed or erased.
The EEDIVH and EEDIVL registers are write once in normal mode.
Upon system reset, the application program is required to write the
correct divider value to EEDIVH and EEDIVL registers based on the
oscillator frequency. After the first write, the value in the EEDIVH and
EEDIVL registers is locked from being overwritten until the next reset.
The EEPROM is then ready for standard program/erase routines.
Runaway code can possibly corrupt the EEDIVH and EEDIVL registers
if they are not initialized (write once registers).
If an existing application code with EEPROM program/erase routines is
fixed and the system is already operating at a known oscillator
frequency, it is recommended to initialize the shadow word with the
corresponding EEDIVH and EEDIVL values in special mode. The
shadow word initializes EEDIVH and EEDIVL registers upon system
reset to ensure software compatibility with existing code. Initializing the
EEDIVH and EEDIVL registers in special modes (SMODN=0) is
accomplished by the following steps.
1. Write correct divider value to EEDIVH and EEDIVL registers
2. Remove the SHADOW word protection by clearing SHPROT bit in
3. Clear NOSHW bit in EEMCR register to make the SHADOW word
4. Write NOSHW bit in EEMCR register to make the SHADOW word
Freescale Semiconductor, Inc.
For More Information On This Product,
based on the oscillator frequency as per
EEPROT register.
visible at $0FC0-$0FC1.
visible at $0FC0-$0FC1.
Go to: www.freescale.com
EEPROM Memory
Programming EEDIVH and EEDIVL Registers
Table
9-1.
EEPROM Memory
Technical Data
135

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