MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 142

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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HPRIO — Highest Priority I Interrupt
Resets and Interrupts
10.7 Interrupt test registers
Technical Data
142
RESET:
Bit 7
1
1
PSEL6
6
1
DLY — Enable Oscillator Start-up Delay on Exit from STOP
Write only if I mask in CCR = 1 (interrupts inhibited). Read anytime.
To give a maskable interrupt source highest priority, write the low byte of
the vector address to the HPRIO register. For example, writing $F0 to
HPRIO would assign highest maskable interrupt priority to the real-time
interrupt timer ($FFF0). If an un-implemented vector address or a non-I-
masked vector address (value higher than $F2) is written, then IRQ will
be the default highest priority interrupt.
These registers are used in special modes for testing the interrupt logic
and priority without needing to know which modules and what functions
are used to generate the interrupts.Each bit is used to force a specific
interrupt vector by writing it to 1.Bits are named with B6 through F4 to
indicate vectors $FFB6 through $FFF4. These bits are also used in
special modes to view that an interrupt caused by a module has reached
the interrupt module.
IRQEN can be read and written anytime in all modes.
The delay time of about 4096 cycles is based on the XCLK rate
chosen.
DLY can be read anytime and written once in normal modes. In
special modes, DLY can be read and written anytime.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = No stabilization delay imposed on exit from STOP mode. A
1 = Stabilization delay is imposed before processing resumes after
PSEL5
5
1
stable external oscillator must be supplied.
STOP.
Go to: www.freescale.com
Resets and Interrupts
PSEL4
4
1
PSEL3
3
0
PSEL2
2
0
MC68HC912DT128A — Rev 4.0
PSEL1
1
1
Bit 0
0
0
MOTOROLA
$001F

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