MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 190

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Clock Functions
Technical Data
190
FCMCOP — Force Clock Monitor Reset or COP Watchdog Reset
WCOP — Window COP mode
Writes are not allowed in normal modes, anytime in special modes.
Read anytime.
If DISR is set, this bit has no effect.
Write once in normal modes, anytime in special modes. Read
anytime.
When set, a write to the COPRST register must occur in the last 25%
of the selected period. A premature write will also reset the part. As
long as all writes occur during this window, $55 can be written as often
as desired. Once $AA is written the time-out logic restarts and the
user must wait until the next window before writing to COPRST.
Please note, there is a fixed time uncertainty about the exact COP
counter state when reset, as the initial prescale clock divider in the
RTI section is not cleared when the COP counter is cleared. This
means the effective window is reduced by this uncertainty.
5
available COP rates.
Freescale Semiconductor, Inc.
below shows the exact duration of this window for the seven
For More Information On This Product,
0 = Normal operation.
1 = A clock monitor failure reset or a COP failure reset is forced
0 = Normal COP operation
1 = Window COP operation
depending on the state of CME and if COP is enabled.
Go to: www.freescale.com
1. Highest priority interrupt vector is serviced.
CME
Clock Functions
0
0
1
1
COP enabled
0
1
0
1
Clock monitor failure
Forced reset
COP failure
MC68HC912DT128A — Rev 4.0
Both
none
(1)
MOTOROLA
Table 12-

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