MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 216

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer:
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Oscillator
13.5.1.3 Bias Current Process Optimization
13.5.1.4 Input ESD Resistor Path Modification
Technical Data
216
For proper oscillation, the gain margin of the oscillator must exceed one
or the circuit will not oscillate. Process variance in the bias current (which
controls the gain of the amplifier) can cause the gain margin to be much
lower than typical. This can be as a result of either too much or too little
current.
To reduce the process sensitivity of the gain, the material of the device
that sets the bias current was changed to a material with tighter process
and temperature control. As a result, the transconductance and Ibias
variances are more limited than in the previous design.
To satisfy the condition of oscillation, the oscillator circuit must not only
provide the correct amount of gain but also the correct amount of phase
shift. In the Pierce configuration, the phase shift due to parasitics in the
input path to the gate of the transconductance amplifier must be as low
as possible. In the original configuration, the parasitic capacitance of the
clock input buffer (OTA), automatic Loop Control circuit (ALC), and input
resistor (RFLT) reacted with the input resistance to cause a large phase
shift.
To reduce the phase shift, the input ESD resistor (marked RESD in the
figure above) was changed from a single path to the input circuitry (the
ALC and the OTA) and oscillator transconductance amplifier (marked
GM in the figure above) to a parallel path. In this configuration, the only
capacitance causing a phase shift on the input to the transconductance
device is due to the transconductance device itself.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Oscillator
MC68HC912DT128A — Rev 4.0
MOTOROLA

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