MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 225

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Technical Data — MC68HC912DT128A
14.1 Contents
14.2 Introduction
MC68HC912DT128A — Rev 4.0
MOTOROLA
14.2
14.3
14.4
The pulse-width modulator (PWM) subsystem provides four
independent 8-bit PWM waveforms or two 16-bit PWM waveforms or a
combination of one 16-bit and two 8-bit PWM waveforms. Each
waveform channel has a programmable period and a programmable
duty-cycle as well as a dedicated counter. A flexible clock select scheme
allows four different clock sources to be used with the counters. Each of
the modulators can create independent, continuous waveforms with
software-selectable duty rates from 0 percent to 100 percent. The PWM
outputs can be programmed as left-aligned outputs or center-aligned
outputs.
The period and duty registers are double buffered so that if they change
while the channel is enabled, the change will not take effect until the
counter rolls over or the channel is disabled. If the channel is not
enabled, then writes to the period and/or duty register will go directly to
the latches as well as the buffer, thus ensuring that the PWM output will
always be either the old waveform or the new waveform, not some
variation in between.
A change in duty or period can be forced into immediate effect by writing
the new value to the duty and/or period registers and then writing to the
counter. This causes the counter to reset and the new duty and/or period
values to be latched. In addition, since the counter is readable it is
Freescale Semiconductor, Inc.
For More Information On This Product,
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
PWM Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . .229
PWM Boundary Cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .240
Go to: www.freescale.com
Pulse Width Modulator
Section 14. Pulse Width Modulator
Technical Data
225

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