MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 250

• Manufacturer Part Number: MC912DG128AMPVE
• Description: IC MCU 128K FLASH 8MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912DG128AMPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 8
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8-ch x 10-bit)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Capture Timer
15.3.2 Pulse Accumulators
15.3.2.1 Pulse Accumulator latch mode
15.3.2.2 Pulse Accumulator queue mode
15.3.3 Modulus Down-Counter
Technical Data
250
There are four 8-bit pulse accumulators with four 8-bit holding registers
associated with the four IC buffered channels. A pulse accumulator
counts the number of active edges at the input of its channel.
The user can prevent 8-bit pulse accumulators counting further than $FF
by PACMX control bit in ICSYS ($AB). In this case a value of $FF means
that 255 counts or more have occurred.
Each pair of pulse accumulators can be used as a 16-bit pulse
accumulator.
There are two modes of operation for the pulse accumulators.
The value of the pulse accumulator is transferred to its holding register
when the modulus down-counter reaches zero, a write $0000 to the
modulus counter or when the force latch control bit ICLAT is written.
At the same time the pulse accumulator is cleared.
When queue mode is enabled, reads of an input capture holding register
will transfer the contents of the associated pulse accumulator to its
holding register.
At the same time the pulse accumulator is cleared.
The modulus down-counter can be used as a time base to generate a
periodic interrupt. It can also be used to latch the values of the IC
registers and the pulse accumulators to their holding registers.
The action of latching can be programmed to be periodic or only once.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Enhanced Capture Timer
MC68HC912DT128A — Rev 4.0
MOTOROLA