MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 270

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912DG128AMPVE
Manufacturer:
FREESCALE
Quantity:
2 902
Part Number:
MC912DG128AMPVE
Manufacturer:
FREESCALE
Quantity:
800
Part Number:
MC912DG128AMPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC912DG128AMPVE
Manufacturer:
FREESCALE
Quantity:
800
PORTT — Timer Port Data Register
TIMTST — Timer Test Register
Enhanced Capture Timer
Technical Data
270
RESET:
RESET:
TIMER
PORT
I/OC7
BIT 7
BIT 7
PT7
0
0
-
I/OC6
PT6
6
6
0
0
-
Read: any time
Write: only in special mode (SMOD = 1).
TCBYP — Main Timer Divider Chain Bypass
Read: any time (inputs return pin level; outputs return data register
contents)
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Queue Mode of Input Capture is enabled.
1 = Latch Mode is enabled. Latching function occurs when
0 = Normal operation
1 = For testing only. The 16-bit free-running timer counter is divided
I/OC5
PT5
5
5
0
0
-
The main timer value is memorized in the IC register by a valid
input pin transition.
With a new occurrence of a capture, the value of the IC register
will be transferred to its holding register and the IC register
memorizes the new timer value.
modulus down-counter reaches zero or a zero is written into
the count register MCCNT (see
With a latching event the contents of IC registers and 8-bit
pulse accumulators are transferred to their holding registers.
8-bit pulse accumulators are cleared.
into two 8-bit halves and the prescaler is bypassed. The clock
drives both halves directly.
When the high byte of timer counter TCNT ($84) overflows
from $FF to $00, the TOF flag in TFLG2 ($8F) will be set.
Go to: www.freescale.com
Enhanced Capture Timer
I/OC4
PT4
4
0
0
4
-
I/OC3
PT3
3
0
0
3
-
I/OC2
PT2
2
0
0
2
-
Buffered IC
MC68HC912DT128A — Rev 4.0
TCBYP
I/OC1
PT1
1
0
1
-
Channels).
BIT 0
I/OC0
BIT 0
PT0
0
0
-
MOTOROLA
$00AE
$00AD

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