MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 284

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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SC0CR2/SC1CR2 — SCI Control Register 2
Multiple Serial Interface
Technical Data
284
RESET:
Bit 7
TIE
0
TCIE
6
0
PE — Parity Enable
PT — Parity Type
Read or write anytime.
TIE — Transmit Interrupt Enable
TCIE — Transmit Complete Interrupt Enable
In the long mode, the SCI circuitry does not begin counting ones in the
search for the idle line condition until a stop bit is received. Therefore,
the last byte’s stop bit and preceding “1” bits do not affect how quickly
an idle line condition can be detected.
If parity is enabled, this bit determines even or odd parity for both the
receiver and the transmitter.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Parity is disabled.
1 = Parity is enabled.
0 = Even parity is selected. An even number of ones in the data
1 = Odd parity is selected. An odd number of ones in the data
0 = TDRE interrupts disabled
1 = SCI interrupt will be requested whenever the TDRE status flag
0 = TC interrupts disabled
1 = SCI interrupt will be requested whenever the TC status flag is
RIE
5
0
character causes the parity bit to be zero and an odd number
of ones causes the parity bit to be one.
character causes the parity bit to be zero and an even number
of ones causes the parity bit to be one.
is set.
set.
Go to: www.freescale.com
Multiple Serial Interface
ILIE
4
0
TE
3
0
RE
2
0
MC68HC912DT128A — Rev 4.0
RWU
1
0
Bit 0
SBK
0
$00C3/$00CB
MOTOROLA

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