MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 356

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912DG128AMPVE
Manufacturer:
FREESCALE
Quantity:
2 902
Part Number:
MC912DG128AMPVE
Manufacturer:
FREESCALE
Quantity:
800
Part Number:
MC912DG128AMPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC912DG128AMPVE
Manufacturer:
FREESCALE
Quantity:
800
MSCAN Controller
18.13.6 msCAN12 Receiver Flag Register (CRFLG)
Technical Data
356
CRFLG
$0104
RESET
W
R
NOTE:
WUPIF
Bit 7
0
The bit time is determined by the oscillator frequency, the baud rate
prescaler, and the number of time quanta (Tq) clock cycles per bit (as
shown above).
The CBTR1 register can only be written if the SFTRES bit in CMCR0 is
set.
All bits of this register are read and clear only. A flag can be cleared by
writing a 1 to the corresponding bit position. A flag can only be cleared
when the condition which caused the setting is no more valid. Writing a
0 has no effect on the flag setting. Every flag has an associated interrupt
enable flag in the CRIER register. A hard or soft reset will clear the
register.
WUPIF — Wake-up Interrupt Flag
RWRNIF — Receiver Warning Interrupt Flag
1. RWRNIF = (96 < REC) & RERRIF& TERRIF & BOFFIF
RWRNIF
If the msCAN12 detects bus activity while it is in SLEEP Mode, it
clears the SLPAK bit in the CMCR0 register; the WUPIF bit will then
be set. If not masked, a Wake-Up interrupt is pending while this flag
is set.
This bit will be set when the msCAN12 goes into warning status due
to the Receive Error counter (REC) exceeding 96 and neither one of
the Error interrupt flags or the Bus-Off interrupt flag is set
masked, an Error interrupt is pending while this flag is set.
Freescale Semiconductor, Inc.
6
0
For More Information On This Product,
0 = No wake-up activity has been observed while in SLEEP Mode.
1 = msCAN12 has detected activity on the bus and requested
0 = No receiver warning status has been reached.
1 = msCAN12 went into receiver warning status.
wake-up.
TWRNIF
Go to: www.freescale.com
5
0
MSCAN Controller
RERRIF
4
0
TERRIF
3
0
BOFFIF
MC68HC912DT128A — Rev 4.0
2
0
OVRIF
1
0
(1)
MOTOROLA
. If not
Bit 0
RXF
0

Related parts for MC912DG128AMPVE