MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 84

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Operating Modes
5.4 Background Debug Mode
Technical Data
84
EMK — Emulate Port K
EME — Emulate Port E
Background debug mode (BDM) is an auxiliary operating mode that is
used for system development. BDM is implemented in on-chip hardware
and provides a full set of debug operations. Some BDM commands can
be executed while the CPU is operating normally. Other BDM
commands are firmware based, and require the BDM firmware to be
enabled and active for execution.
In special single-chip mode, BDM is enabled and active immediately out
of reset. BDM is available in all other operating modes, but must be
enabled before it can be activated. BDM should not be used in special
peripheral mode because of potential bus conflicts.
In single-chip mode PORTK and DDRK are always in the map
regardless of the state of this bit.
Normal modes: write once; special modes: write anytime EXCEPT
the first time. Read anytime.
In single-chip mode PORTE and DDRE are always in the map
regardless of the state of this bit.
Normal modes: write once; special modes: write anytime EXCEPT
the first time. Read anytime.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Port K and DDRK registers are in the memory map. Memory
1 = In expanded or peripheral mode, PORTK and DDRK are
0 = PORTE and DDRE are in the memory map.
1 = If in an expanded mode, PORTE and DDRE are removed from
expansion emulation is disabled and all pins are general
purpose I/O.
removed from the internal memory map. Removing the
registers from the map allows the user to emulate the function
of these registers externally.
the internal memory map. Removing the registers from the
map allows the user to emulate the function of these registers
externally.
Go to: www.freescale.com
Operating Modes
MC68HC912DT128A — Rev 4.0
MOTOROLA

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