MC68LK332ACAG16 Freescale Semiconductor, MC68LK332ACAG16 Datasheet - Page 54

• Manufacturer Part Number: MC68LK332ACAG16
• Description: IC MCU 32BIT LV AMASK 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68LK332ACAG16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16.78MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: QSPI, SCI, UART
• Minimum Operating Temperature: - 40 C
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 16
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 2KB
• # I/os (max): 15
• Number Of Timers - General Purpose: 16
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.1.7 Period Measurement with Missing Transition Detect (PMM)
5.1.8 Position-Synchronized Pulse Generator (PSP)
5.1.9 Stepper Motor (SM)
5.1.10 Period/Pulse-Width Accumulator (PPWA)
54
MOTOROLA
Period measurement with missing transition detect allows a special-purpose 23-bit period measure-
ment. It detects the occurrence of a missing transition (caused by a missing tooth on the sensed wheel),
indicated by a period measurement that is greater than a programmable ratio of the previous period
measurement. Once detected, this condition can be counted and compared to a programmable number
of additional transitions detected before TCR2 is reset to $FFFF. In addition, one byte at an address
specified by a channel parameter can be read and used as a flag. A nonzero value of the flag indicates
that TCR2 is to be reset to $FFFF once the next missing transition is detected.
Any channel of the TPU can generate an output transition or pulse, which is a projection in time based
on a reference period previously calculated on another channel. Both TCRs are used in this algorithm:
TCR1 is internally clocked, and TCR2 is clocked by a position indicator in the user's device. An example
of a TCR2 clock source is a sensor that detects special teeth on the flywheel of an automobile using
PMA or PMM. The teeth are placed at known degrees of engine rotation; hence, TCR2 is a coarse rep-
resentation of engine degrees, i.e., each count represents some number of degrees.
Up to 15 position-synchronized pulse generator function channels can operate with a single input ref-
erence channel executing a PMA or PMM input function. The input channel measures and stores the
time period between the flywheel teeth and resets TCR2 when the engine reaches a reference position.
The output channel uses the period calculated by the input channel to project output transitions at spe-
cific engine degrees. Because the flywheel teeth might be 30 or more degrees apart, a fractional multi-
plication operation resolves down to the desired degrees. Two modes of operation allow pulse length
to be determined either by angular position or by time.
The stepper motor control algorithm provides for linear acceleration and deceleration control of a step-
per motor with a programmable number of step rates of up to 14. Any group of channels, up to eight,
can be programmed to generate the control logic necessary to drive a stepper motor.
The time period between steps (P) is defined as:
where r is the current step rate (1–14), and K1 and K2 are supplied as parameters.
After providing the desired step position in a 16-bit parameter, the CPU issues a step request. Next, the
TPU steps the motor to the desired position through an acceleration/deceleration profile defined by pa-
rameters. The parameter indicating the desired position can be changed by the CPU while the TPU is
stepping the motor. This algorithm changes the control state every time a new step command is re-
ceived.
A 16-bit parameter initialized by the CPU for each channel defines the output state of the associated
pin. The bit pattern written by the CPU defines the method of stepping, such as full stepping or half step-
ping. With each transition, the 16-bit parameter rotates one bit. The period of each transition is defined
by the programmed step rate.
The period/pulse-width accumulator algorithm accumulates a 16-bit or 24-bit sum of either the period
or the pulse width of an input signal over a programmable number of periods or pulses (from 1 to 255).
After an accumulation period, the algorithm can generate a link to a sequential block of up to eight chan-
nels. The user specifies a starting channel of the block and number of channels within the block. Gen-
eration of links depends on the mode of operation. Any channel can be used to measure an
accumulated number of periods of an input signal. A maximum of 24 bits can be used for the accumu-
Freescale Semiconductor, Inc.
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P(r) = K1 – K2 r
MC68332TS/D
MC68332