MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1021
MPC562MZP56
Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC562MZP56
Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
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Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
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24.9.2.2
The data read message contains the data read value and the address of the target location, relative to the
previous data trace message.
The data read message has the following format:
24.9.2.3
A data trace synchronization message shall be transmitted via the auxiliary port (provided data trace is
enabled) for the following conditions:
Data trace synchronization messages provide the full address (without leading zeros) and ensure that
development tools fully synchronize with data trace regularly. Synchronization messages provide a
reference address for subsequent DTMs, in which only the unique portion of the data trace address is
transmitted.
Data trace synchronization messages are of two types:
Freescale Semiconductor
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Initial data trace message upon exit of any system reset will be a synchronization message.
Upon exit of sleep, deep-sleep and low power down mode, the first data trace message will be a
synchronization message.
Initial data trace message upon exit of background debug mode. Upon exiting BDM, the next data
trace message will be a synchronization message.
When data trace is enabled, the first data trace message will be a synchronization message.
After 255 data trace messages have been queued without synchronization, the next data trace
message will be a synchronization message.
Upon assertion of an event In (EVTI) signal. If the READI module is not disabled at reset, when
EVTI asserts, if the EC field is 0b00 in the DC register, the next data trace message will be a
synchronization message.
Upon occurrence of a watchpoint, the next data trace message will be a synchronization message.
Occurrence of queue overrun. A data trace overrun error occurs when a trace message cannot be
queued due to the queue being full (provided data trace is enabled). This causes the message queue
to be flushed, and an error message is placed as the first message in the queue. The error code
within the error message indicates that program/data/ownership trace overrun has occurred. The
next data trace message will be a synchronization message.
Data write
Data read
Data Read Message
Data Trace Synchronization Messages
TCODE (6)
[6 bits]
Figure 24-45. Data Read Message Format
MPC561/MPC563 Reference Manual, Rev. 1.2
Relative Address
Max Length = 63 bits
Min Length = 15 bits
[1 to 25 bits]
[8, 16, 24, or 32 bits]
Data Value
READI Module
24-53
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