MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1356

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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66-MHz Electrical Characteristics
G.15 QADC64E Electrical Characteristics
Note: (V
G-50
1
2
3
4
5
6
7
Num
102a
107a
100
101
102
104
105
106
107
Conversion characteristics vary with F
The number of conversion cycles is dependent on the IST bit in the CCW register.
At V
Accuracy tested and guaranteed at V
This parameter is periodically sampled rather than 100% tested.
Absolute error includes 1/2 count (~2.5 mV) of inherent quantization error and circuit (differential, integral, and
offset) error. Specification assumes that adequate low-pass filtering is present on analog input pins — capacitive filter
with 0.01 µF to 0.1 µF capacitor between analog input and analog ground, typical source isolation
impedance of 10 KΩ.
Input signals with large slew rates or high frequency noise components cannot be converted accurately. These signals
may affect the conversion accuracy of other channels.
97
98
99
DD
RH
= 2.6 V ± 0.1 V, V
QADC Clock (QCLK) Frequency
Conversion Cycles
Legacy mode: QADCMCR[FLIP] = 0
Enhanced mode: QADCMCR[FLIP] = 1
Conversion Time
F
Legacy mode: QADCMCR[FLIP] = 0
Min = CCW[IST] =0b00, CCW[BYP] = 0
Max = CCW[IST] =0b11, CCW[BYP] = 1
Enhanced mode: QADCMCR[FLIP] = 1
Min = CCW[IST] =0b0
Max = CCW[IST] =0b1
Stop Mode Recovery Time
Resolution
Absolute (total unadjusted) error
F
Absolute (total unadjusted) error
F
DC Disruptive Input Injection Current
Current Coupling Ratio
Incremental error due to injection current
All channels have same 10KΩ < Rs <100kΩ
Channel under test has Rs=10KΩ, I
Source impedance at input
Incremental capacitance during Sampling
– V
QCLK
QCLK
QCLK
PQA
PQB
RL
= 2.0 MHz
= 2.0MHz
= 2.0MHz
= 5.12 V, one count = 5 mV.
3
DDH
3
3
1
, 2 clock input sample time
, 2 clock input sample time
2
Table G-16. QADC64E Conversion Characteristics
= 5.0 V ± 0.25 V, T
Parameter
20
MPC561/MPC563 Reference Manual, Rev. 1.2
21
RH
QCLK
1
4, 5, 6, 7
8, 9, 10, 11
– V
INJ
12, 13, 14, 15, 16
rate. Reduced conversion accuracy occurs at max F
RL
=+3mA
A
= 5.0 V ± 0.25 V
= T
22
L
to T
H
)
Symbol
C
T
F
AE
I
I
INJ
INJ
E
CONV
T
QCLK
SAMP
CC
CC
AE
R
K
SR
INJ
ALT
S
17
18
-3
Min
-7.8
0.5
6.0
7.0
12
14
-2
-1
5
19
8x10
8x10
Max
+1.0
+1.0
100
3.0
3.5
28
20
14
10
10
2
3
1
5
Freescale Semiconductor
-5
-5
QCLK
rate.
QCLK cycles
QCLK cycles
Counts
Counts
Counts
Units
MHz
mV
mV
mA
KΩ
pF
µs
µs
µs
µs
µs

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