MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 139

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Freescale Semiconductor
A_TPUCH[0:15
B_TPUCH[0:15
MPIO32B13
MPIO32B15
MPIO32B12 /
MPIO32B14 /
Signal List
ETRIG[1:2] /
PPM_TCLK
A_T2CLK /
B_T2CLK /
C_CNTX0
PPM_RX0
PPM_TX0
PCS[6:7]
A_ANw /
A_PQB0
A_AN0 /
PCS5
PCS4
]
]
3
3
1
/
/
Voltage
2.6 V
2.6 V
2.6 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
Table 2-14. MPC561/MPC563 Signal Reset State (continued)
Controlled
Slew Rate
Option?
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
MPC561/MPC563 Reference Manual, Rev. 1.2
No
No
No
No
QADC64E_A / QADC64E_B
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 25
50 ; 50
50 ; 25
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
Drive
Load
(pF)
N/A
NA
NA
NA
NA
2
TPU_A / TPU_B
5
5
5
5
5
5
5
PU5 until
PULL_DIS0 is
set
Pull device
enabled until
PULL_DIS0 is
set
Pull device
enabled until
PULL_DIS0 is
set
Pull device
enabled until
PULL_DIS0 is
set
Pull device
enabled until
PRDS is set
PU5 when driver
not enabled or
until T2CLK_PU
is set
Pull device
enabled until
PRDS is set
PU5 when driver
not enabled or
until T2CLK_PU
is set
PD until
PULL_DIS5 is
set
PU5 until
PULL_DIS1 is
set
PU5 when driver
not enabled or
until
PULL_DIS2 is
set
Reset State
16
16
16
16
16
Hysteresi
Enabled?
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
s
MPIO32B12
MPIO32B13
MPIO32B14
MPIO32B15
A_TPUCH[0:15]
A_T2CLK
B_TPUCH[0:15]
B_T2CLK
ETRIG[1:2]
A_AN0
Function After HRESET,
PORESET/TRST
Signal Descriptions
2-41

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