MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 299

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC562MZP56
Manufacturer:
FREESCAL
Quantity:
204
Part Number:
MPC562MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC562MZP56
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MPC562MZP56
Manufacturer:
FREESCALE
Quantity:
7 699
Company:
Part Number:
MPC562MZP56
Quantity:
1 500
Part Number:
MPC562MZP56R2
Manufacturer:
RFT
Quantity:
1 441
Part Number:
MPC562MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
7.5.2
Following is the hard reset configuration word that is sampled from the internal data bus,
data_sgpiod(0:31) on the negation of HRESET. If the external reset config word is selected (RSTCONF =
0), the internal data bus will reflect the state of external data bus. If the internal reset config word is selected
and neither of the Flash reset config words are enabled (UC3FCFIG[HC] = 1), the internal data bus is
internally driven with all zeros. The reset configuration word is not a register in the memory map. Most of
the bits in the configuration are located in registers in the SIU. Refer to
of each control bit.
Freescale Semiconductor
1
HRESET
HRESET
Available only on the MPC562/MPC564, software should write "0" to this bit for MPC561/MPC563.
Bits
Field EARB
Field PRPM
0
1
2
3
Hard Reset Configuration Word (RCW)
MSB
16
Name
EARB
BDRV
0
BDIS
IP
IP BDRV BDIS
17
1
SC
External Arbitration — Refer to
Bus arbitration. The default value is that internal arbitration hardware is used.
0 Internal arbitration is performed
1 External arbitration is assumed
Initial Interrupt Prefix — This bit defines the initial value of MSR[IP] immediately after reset.
MSR[IP] defines the Interrupt Table location. If IP is zero then the initial value of MSR[IP] is zero,
If the IP is one, then the initial value of MSR[IP] is one. Default value is zero. See
more information.
0 MSR[IP] = 0 after reset
1 MSR[IP] = 1 after reset
Bus Pins Drive Strength — This bit determines the bus pins (address, data and control) driving
capability to be either full or reduced drive. The bus default drive strength is full; Upon default, it
also effects the CLKOUT drive strength to be full. See
controls the default state of COM1 in the SIUMCR.
0 Full drive
1 Reduced drive
Boot Disable — If the BDIS bit is set, then memory controller is not activated after reset. If it is
cleared then the memory controller bank 0 is active immediately after reset such that it matches
any addresses. If a write to the OR0 register occurs after reset this bit definition is ignored. The
default value is that the memory controller is enabled to control the boot with the CS0 pin. See
Section 10.7, “Global (Boot) Chip-Select
0 Memory controller bank 0 is active and matches all addresses immediately after reset
1 Memory controller is not activated after reset.
18
2
ETRE FLEN
Figure 7-7. Reset Configuration Word (RCW)
19
3
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 7-5. RCW Bit Descriptions
20
4
BPS[0:1]
COMP
EN_
21
5
1
0000_0000_0000_0000
0000_0000_0000_0000
Section 9.5.7, “Arbitration
COMP
EXC_
22
6
1
Operation,” for more information.
Description
23
7
24
8
OERC
DBGC[0:1]
25
9
Table 6-7
Table 7-5
Phase,” for a detailed description of
10
26
for more information. BDRV
11
27
for a detailed description
ATWC EBDF[0:1]
12
28
ISB
13
29
Table 3-11
14
30
DME
for
LSB
15
31
Reset
7-11

Related parts for MPC562MZP56