MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 391

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Figure
accessing internal space in the MPC561/MPC563.
Freescale Semiconductor
9-37,
1. Request Bus (BR)
2. Receives Bus Grant (BG) From Arbiter
3. Asserts Bus Busy (BB) if No Other Master is Driving
4. Assert Transfer Start (TS)
5. Drives Address and Attributes
Figure
The minimum number of wait states for such access is two clocks. The
accesses in these figures are valid for both peripheral mode and slave mode.
9-38, and
Figure 9-36. Basic Flow of an External Master Write Access
External Master
1. Drives Data
Figure 9-39
MPC561/MPC563 Reference Manual, Rev. 1.2
describe read and write cycles from an external master
NOTE
1. Asserts Transfer Acknowledge (TA)
1. Receives Data
Address in Internal
Memory Map
1. Receives Address
MPC500 Device
Yes
Asserts CSx
If In Range
Controller
Memory
No
External Bus Interface
9-51

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