MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 699

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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1
1
Length (Rx) Length (in bytes) of the Rx data stored in offset 0x6 through 0xD of the buffer.This field is written by
New Frame
Length (Tx)
Before Rx
Reserved
For Tx message buffers, upon read, the BUSY bit should be ignored.
When a matching remote request frame is detected, the code for such a message buffer is changed to be 0b1110.
Rx Code
0b0XY1
0b0000
0b0100
0b0010
0b0110
Field
RTR
Data
x
0
1
0
0
1
Initial Tx Code
the TouCAN module, copied from the DLC (data length code) field of the received frame.
Length (in bytes) of the data to be transmitted, located in offset 0x6 through 0xD of the buffer. This
field is written by the CPU and is used as the DLC field value. If RTR (remote transmission request)
= 1, the frame is a remote frame and will be transmitted without data field, regardless of the value in
Tx length.
This field can store up to eight data bytes for a frame. For Rx frames, the data is stored as it is
received from the bus. For Tx frames, the CPU provides the data to be transmitted within the frame.
The CPU controls access to this word entry field (16 bits).
NOT ACTIVE — message buffer is not active.
EMPTY — message buffer is active and empty.
FULL — message buffer is full.
OVERRUN — addtional frame was received into a full
buffer before the CPU read the first one.
BUSY — message buffer is now being filled with a new
receive frame. This condition will be cleared within 20
cycles.
Table 16-1. Common Extended/Standard Format Frames (continued)
0b1010
0b1000
0b1100
0b1100
0b1110
Table 16-3. Message Buffer Codes for Transmit Buffers
Table 16-2. Message Buffer Codes for Receive Buffers
1
Message buffer not ready for transmit.
Data frame to be transmitted once, unconditionally.
Remote frame to be transmitted once, and message buffer
becomes an Rx message buffer for data frames.
Data frame to be transmitted only as a response to a remote
frame, always.
Data frame to be transmitted only once, unconditionally, and
then only as a response to remote frame, always.
MPC561/MPC563 Reference Manual, Rev. 1.2
Description
Description
Description
New Frame
Rx Code
After Rx
0b0010
0b0110
0b0010
0b0110
If a CPU read occurs before
the new frame, new receive
code is 0010.
An empty buffer was filled
(XY was 10).
A full/overrun buffer was
filled (Y was 1).
CAN 2.0B Controller Module
Comment
Transmission
Successful
Code After
0b1000
0b0100
0b1010
0b1010
16-5

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