MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 723

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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16.7.6
Freescale Semiconductor
13:15
Bits
0:7
10
11
12
SRESET
8
9
Field
Addr
Prescaler Divide Register (PRESDIV)
CANCTRL0
PROPSEG
TSYNC
SAMP
Name
MSB
LBUF
0
1
0x30 7088 (PRESDIV_A); 0x30 7488 (PRESDIV_B); 0x30 7888 (PRESDIV_C)
See
Sampling mode. The SAMP bit determines whether the TouCAN module will sample each
received bit one time or three times to determine its value.
0 One sample, taken at the end of phase buffer segment one, is used to determine the value
1 Three samples are used to determine the value of the received bit. The samples are taken
Reserved
Timer synchronize mode. The TSYNC bit enables the mechanism that resets the
free-running timer each time a message is received in message buffer zero. This feature
provides the means to synchronize multiple TouCAN stations with a special “SYNC”
message (global network time).
0 Timer synchronization disabled.
1 Timer synchronization enabled.
Note: there can be a bit clock skew of four to five counts between different TouCAN modules
that are using this feature on the same network.
Lowest buffer transmitted first. The LBUF bit defines the transmit-first scheme.
0 Message buffer with lowest ID is transmitted first.
1 Lowest numbered buffer is transmitted first.
Reserved
Propagation segment time. PROPSEG defines the length of the propagation segment in the
bit time. The valid programmed values are zero to seven. The propagation segment time is
calculated as follows:
where
2
of the received bit.
at the normal sample point and at the two preceding periods of the S-clock.
Propagation Segment Time = (PROPSEG + 1) Time Quanta
1 Time Quantum = 1 Serial Clock (S-Clock) Period
Table 16-13
PRESDIV
Table 16-16. CANCTRL1 Bit Descriptions
MPC561/MPC563 Reference Manual, Rev. 1.2
3
Figure 16-13. Prescaler Divide Register
4
5
0000_0000_0000_0000
6
7
Description
8
9
10
CANCTRL2
11
12
CAN 2.0B Controller Module
13
14
LSB
15
16-29

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