MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 826

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Peripheral Pin Multiplexing (PPM) Module
18-20
Bits
9:15
0:2
3:4
5
6
7
8
SH_TCAN2
SH_TCAN[2:0]
0
0
0
0
1
1
SH_TPU[1:0]
SH_T2CLK
SH_ET1
SH_ET2
Name
SH_TCAN1
Table 18-8. SHORT_REG[SH_TCAN] Bit Settings
0
0
1
1
0
0
Short TouCAN modules. These three bits determine which TouCAN modules are inter-
nally shorted. See
Short TPU3 modules. The channels A_TPUCH0 and B_TPUCH0 can be internally
shorted by the SH_TPU0. Channels A_TPUCH1 and B_TPUCH1 can be internally
shorted by SH_TPU1. The effect of the internal shorts depends on the input/output en-
able control for the TPU channels themselves. See
bit settings for TPU shorting.
Reserved
Short ETRIG1. This bit enables an internal short between ETRIG1 and A_TPUCH15.
0 Short disabled
1 Short ETRIG1 to A_TPUCH15 enabled
Short ETRIG2. This bit enables an internal short between ETRIG2 and B_TPUCH15.
0 Short disabled
1 Short ETRIG2 to B_TPUCH15 enabled
Short T2CLK. This bit enables a short between A_T2CLK and B_T2CLK.
0 Short disabled
1 Short A_T2CLK and B_T2CLK enabled. A_T2CLK then takes the input clock.
Reserved
Table 18-7. SHORT_REG Bit Descriptions
MPC561/MPC563 Reference Manual, Rev. 1.2
SH_TCAN0
0
1
0
1
0
1
Table 18-8
No Short
No Short
No Short
TouCAN_C[C_CNRX0, C_CNTX0] shorted to
TouCAN_B[B_CNRX0, B_CNTX0]
Both modules communicate via B_CNTX0,
B_CNRX0.
No Short
TouCAN_C[C_CNRX0, C_CNTX0] shorted to
TouCAN_A[A_CNRX0, A_CNTX0]
Both modules communicate via A_CNTX0,
A_CNRX0.
for a description of the effects of these bit settings.
Description
Effects On TouCAN Modules
Table 18-9
for more information on
Freescale Semiconductor

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