ATTINY20-SSU Atmel, ATTINY20-SSU Datasheet - Page 165
ATTINY20-SSU
Manufacturer Part Number
ATTINY20-SSU
Description
MCU AVR 2KB FLASH 12MHZ 14SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY20-EK1.pdf
(224 pages)
Specifications of ATTINY20-SSU
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
ATtiny
Core
AVR
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI, TWI
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY20-SSU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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19.3.2
19.3.3
8235B–AVR–04/11
Flash Memory
Configuration Section
The embedded Flash memory of ATtiny20 has four separate sections, as shown in
Table 19-3.
Notes:
ATtiny20 has one configuration byte, which resides in the configuration section. See
Table 19-4.
Table 19-5
into the configuration byte.
Table 19-5.
Notes:
Configuration bits are not affected by a chip erase but they can be cleared using the configura-
tion section erase command (see
configuration bits are locked if Non-Volatile Lock Bit 1 (NVLB1) is programmed.
Section
Code (program memory)
Configuration
Signature
Calibration
Configuration word address
0x00
0x01 ... 0x0F
Bit
7
6
5
4
3
2
1
0
1. This section is read-only.
1. See
(1)
(1)
briefly describes the functionality of all configuration bits and how they are mapped
Bit Name
–
BODLEVEL2
BODLEVEL1
BODLEVEL0
–
CKOUT
WDTON
RSTDISBL
Number of Words and Pages in the Flash
Configuration bytes
Configuration Byte 0
Table 20-6 on page 176
(1)
(1)
(1)
Size (Bytes)
Description
Reserved
Brown-out Detector trigger level
Brown-out Detector trigger level
Brown-out Detector trigger level
Reserved
System Clock Output
Watchdog Timer always on
External Reset disable
2048
16
32
16
High byte
Reserved
Reserved
“Erasing the Configuration Section” on page
for BODLEVEL Fuse decoding.
Page Size (Words)
16
16
16
16
Configuration word data
Pages
Low byte
Configuration Byte 0
Reserved
64
1
2
1
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
WADDR
[4:1]
[4:1]
[4:1]
[4:1]
ATtiny20
169). Note that
Table
Table
PADDR
[10:5]
[5:5]
19-3.
–
–
19-4.
165
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