MC908AZ60ACFU Freescale Semiconductor, MC908AZ60ACFU Datasheet - Page 155

• Manufacturer Part Number: MC908AZ60ACFU
• Description: IC MCU FLASH 8.4MHZ 60K 64QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60ACFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

14.3.1 Entering Monitor Mode
Table 14-1
Enter monitor mode by either
Once out of reset, the MCU waits for the host to send eight security bytes (see
security bytes, the MCU sends a break signal (10 consecutive logic 0s) to the host computer, indicating
that it is ready to receive a command.
Monitor mode uses alternate vectors for reset, SWI, and break interrupt. The alternate vectors are in the
$FE page instead of the $FF page and allow code execution from the internal monitor firmware instead
of user code. The COP module is disabled in monitor mode as long as V
Electrical
Integration Module (SIM)
Table 14-2
Freescale Semiconductor
•
•
Executing a software interrupt instruction (SWI) or
Applying a logic 0 and then a logic 1 to the RST pin.
Characteristics), is applied to either the IRQ pin or the RESET pin. (See
shows the pin conditions for entering monitor mode.
is a summary of the differences between user mode and monitor mode.
1. For V
1. If the high voltage (V
Monitor
Holding the PTC3 pin low when entering monitor mode causes a bypass of
a divide-by-two stage at the oscillator. The CGMOUT frequency is equal to
the CGMXCLK frequency, and the OSC1 input directly generates internal
bus clocks. In this case, the OSC1 signal must have a 50% duty cycle at
maximum bus frequency.
Modes
User
V
V
the SIM asserts its COP enable output. The COP is enabled or disabled by the COPD bit
in the configuration register. (see
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
HI
HI
(1)
(1)
HI
,
28.1.4 5.0 Volt DC Electrical
Disabled
1
1
for more information on modes of operation).
Enabled
COP
0
0
(1)
1
1
HI
) is removed from the IRQ and/or RESET pin while in monitor mode,
Table 14-2. Mode Differences
1
0
Vector
$FEFE
$FFFE
Table 14-1. Mode Selection
Reset
High
Monitor
Monitor
Mode
28.1.4 5.0 Volt DC Electrical
Vector
$FEFF
$FFFF
Reset
Characteristics, and
Low
NOTE
CGMXCLK
---------------------------- -
Functions
2
Vector
$FFFC
$FEFC
Break
High
CGMXCLK
CGMOUT
or
28.1.1 Maximum
CGMVCLK
---------------------------- -
Vector
$FFFD
$FEFD
Break
Low
Characteristics).
2
HI
Vector
$FFFC
$FEFC
(see
High
SWI
14.3.8
Ratings.
Frequency
CGMOUT
------------------------- -
CGMOUT
------------------------- -
28.1.4 5.0 Volt DC
Bus
Chapter 9 System
2
2
Vector
$FFFD
$FEFD
Functional Description
SWI
Low
Security). After the
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