MC908AZ60ACFU Freescale Semiconductor, MC908AZ60ACFU Datasheet - Page 210

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MC908AZ60ACFU

Manufacturer Part Number
MC908AZ60ACFU
Description
IC MCU FLASH 8.4MHZ 60K 64QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AZ60ACFU

Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
52
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Serial Peripheral Interface (SPI)
19.5.2 Transmission Format When CPHA = 0
Figure 19-4
as a replacement for data sheet parametric information. Two waveforms are shown for SCK: one for
CPOL = 0 and another for CPOL = 1. The diagram may be interpreted as a master or slave timing
diagram since the serial clock (SCK), master in/slave out (MISO), and master out/slave in (MOSI) pins
are directly connected between the master and the slave. The MISO signal is the output from the slave,
and the MOSI signal is the output from the master. The SS line is the slave select input to the slave. The
slave SPI drives its MISO output only when its slave select input (SS) is low, so that only the selected
slave drives to the master. The SS pin of the master is not shown but is assumed to be inactive. The SS
pin of the master must be high or must be reconfigured as general-purpose I/O not affecting the SPI (see
19.6.2 Mode Fault
the slave must begin driving its data before the first SPSCK edge, and a falling edge on the SS pin is used
to start the transmission. The SS pin must be toggled high and then low again between each byte
transmitted.
210
CAPTURE STROBE
FOR REFERENCE
FROM MASTER
SCK CPOL = 0
SCK CPOL = 1
SCK CYCLE #
FROM SLAVE
SS TO SLAVE
shows an SPI transmission in which CPHA (SPCR) is logic 0. The figure should not be used
MOSI
MISO
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Error). When CPHA = 0, the first SPSCK edge is the MSB capture strobe. Therefore,
MSB
Figure 19-4. Transmission Format (CPHA = 0)
MSB
1
BIT 6
BIT 6
2
BIT 5
BIT 5
3
BIT 4
BIT 4
4
BIT 3
BIT 3
5
BIT 2
BIT 2
6
BIT 1
BIT 1
7
Freescale Semiconductor
LSB
LSB
8

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