MC908AZ60ACFU Freescale Semiconductor, MC908AZ60ACFU Datasheet - Page 87

• Manufacturer Part Number: MC908AZ60ACFU
• Description: IC MCU FLASH 8.4MHZ 60K 64QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60ACFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

7.4 Functional Description
The 512 bytes of EEPROM-2 are located at $0600-$07FF and can be programmed or erased without an
additional external high voltage supply. The program and erase operations are enabled through the use
of an internal charge pump. For each byte of EEPROM, the write/erase endurance is 10,000 cycles.
7.4.1 EEPROM-2 Configuration
The 8-bit EEPROM-2 Nonvolatile Register (EE2NVR) and the 16-bit EEPROM-2 Timebase Divider
Nonvolatile Register (EE2DIVNVR) contain the default settings for the following EEPROM configurations:
EE2NVR and EE2DIVNVR are nonvolatile EEPROM registers. They are programmed and erased in the
same way as EEPROM bytes. The contents of these registers are loaded into their respective volatile
registers during a MCU reset. The values in these read/write volatile registers define the EEPROM-2
configurations.
For EE2NVR, the corresponding volatile register is the EEPROM-2 Array Configuration Register
(EE2ACR). For the EE2DIVNCR (two 8-bit registers: EE2DIVHNVR and EE2DIVLNVR), the
corresponding volatile register is the EEPROM-2 Divider Register (EE2DIV: EE2DIVH and EE2 DIVL).
7.4.2 EEPROM-2 Timebase Requirements
A 35μs timebase is required by the EEPROM-2 control circuit for program and erase of EEPROM content.
This timebase is derived from dividing the CGMXCLK or bus clock (selected by EEDIVCLK bit in
CONFIG-2 Register) using a timebase divider circuit controlled by the 16-bit EEPROM-2 Timebase
Divider EE2DIV Register (EE2DIVH and EE2DIVL).
As the CGMXCLK or bus clock is user selected, the EEPROM-2 Timebase Divider Register must be
configured with the appropriate value to obtain the 35 μs. The timebase divider value is calculated by
using the following formula:
This value is written to the EEPROM-2 Timebase Divider Register (EE2DIVH and EE2DIVL) or
programmed into the EEPROM-2 Timebase Divider Nonvolatile Register prior to any EEPROM program
or erase operations
Freescale Semiconductor
•
•
•
EE2DIV= INT[Reference Frequency(Hz) x 35 x10
EEPROM-2 Timebase Reference
EEPROM-2 Security Option
EEPROM-2 Block Protection
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
(7.4.1 EEPROM-2 Configuration
-6
and
+0.5]
7.4.2 EEPROM-2 Timebase
Functional Description
Requirements).
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