AT86RF212-ZU Atmel, AT86RF212-ZU Datasheet - Page 125

• Manufacturer Part Number: AT86RF212-ZU
• Description: IC TXRX ZIGBE/802.15.4/ISM 32QFN
• Manufacturer: Atmel

Specifications of AT86RF212-ZU

• Frequency: 700MHz, 800MHz, 900MHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, ISM
• Applications: ISM, ZigBee™
• Power - Output: 10dBm
• Sensitivity: -110dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 9.2mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 769 MHz to 935 MHz
• Interface Type: SPI
• Noise Figure: 7 dB
• Output Power: 21 dB
• Operating Supply Voltage: 1.8 V, 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.8.5 Interrupt Handling
7.8.6 Register Description
8168C-MCU Wireless-02/10
Two different interrupts indicate the PLL status. IRQ_0 (PLL_LOCK) indicates that the
PLL has locked. IRQ_1 (PLL_UNLOCK) indicates an unexpected unlock condition. A
PLL_LOCK interrupt clears any preceding PLL_UNLOCK interrupt automatically and
vice versa.
A PLL_LOCK interrupt occurs in the following situations:
• State change from TRX_OFF to PLL_ON / RX_ON
• Frequency setting change in states PLL_ON / RX_ON
• A manually started center frequency calibration has been completed
All other PLL_LOCK interrupt events indicate that the PLL locked again after a prior
unlock happened.
A PLL_UNLOCK interrupt occurs in the following situations:
• A manually initiated center frequency calibration in states PLL_ON / (RX_ON)
• Frequency setting change in states PLL_ON / RX_ON
PLL_LOCK and PLL_UNLOCK affect the behavior of the transceiver:
In states BUSY_TX and BUSY_TX_ARET the transmission is stopped and the
transceiver returns into state PLL_ON. During BUSY_RX and BUSY_RX_AACK, the
transceiver returns to state RX_ON and RX_AACK_ON, respectively, once the PLL has
locked.
Register 0x08 (PHY_CC_CCA):
The register PHY_CC_CCA contains register bits to set the channel center frequency
according to channel page 0 of IEEE 802.15.4-2003/2006 for the European and North
American band. A write access to the register bits CHANNEL sets the channel number;
a read access shows the current channel number. It is necessary to set register bits
CC_BAND (register 0x14, CC_CTRL_1) to 0 in order to enable the above described
channel selection, see Table 7-35.
Table 7-36. Register 0x08 (PHY_CC_CCA)
• Bit 7:5
Refer to section 6.6.6.
Bit
Name
Read/Write
Reset Value
Bit
Name
Read/Write
Reset Value
7
CCA_REQUEST
W
0
3
CHANNEL[3]
R/W
0
6
CCA_MODE
R/W
0
2
CHANNEL[2]
R/W
1
5
CCA_MODE
R/W
1
1
CHANNEL[1]
R/W
0
AT86RF212
4
CHANNEL[4]
R/W
0
0
CHANNEL[0]
R/W
1
125