A3P1000L-PQG208 Actel, A3P1000L-PQG208 Datasheet - Page 102

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A3P1000L-PQG208

Manufacturer Part Number
A3P1000L-PQG208
Description
FPGA - Field Programmable Gate Array 1M SYSTEM GATES
Manufacturer
Actel
Datasheet

Specifications of A3P1000L-PQG208

Processor Series
A3P1000
Core
IP Core
Maximum Operating Frequency
781.25 MHz
Number Of Programmable I/os
154
Data Ram Size
147456
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
1 M
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3P1000L-PQG208
Manufacturer:
Microsemi SoC
Quantity:
10 000
ProASIC3L DC and Switching Characteristics
Table 2-152 • Minimum and Maximum DC Input and Output Levels
Figure 2-19 • AC Loading
Table 2-153 • AC Waveforms, Measuring Points, and Capacitive Loads
2- 88
SSTL2 Class
I
Drive
Strength
15 mA
Notes:
1. Currents are measured at 100°C junction temperature and maximum voltage.
2. Currents are measured at 85°C junction temperature.
Input Low (V)
VREF – 0.2
*
Measuring point = V
SSTL2 Class I
Stub-Speed Terminated Logic for 2.5 V memory bus standard (JESD8-9). ProASIC3E devices support
Class I. This provides a differential amplifier input buffer and a push-pull output buffer.
Min.
–0.3 VREF – 0.2 VREF + 0.2
V
Input High (V)
trip
VREF + 0.2
VIL
. See
Max.
V
Table 2-15 on page 2-12
Min.
V
Test Point
Measuring
Point* (V)
VIH
1.25
Max.
2.7
V
SSTL2
Class I
for a complete table of trip points.
25
R e visio n 9
Max.
VREF (typ.) (V)
VOL
0.54
V
V
TT
1.25
50
VCCI – 0.62 15 15
30 pF
VOH
Min.
V
VTT (typ.) (V)
mA mA
I
OL
1.25
I
OH
Max.
mA
I
OSL
83
1
Max.
I
mA
OSH
87
C
LOAD
1
30
µA
I
(pF)
10 10
IL
2
µA
I
IH
2

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