A3P1000L-PQG208 Actel, A3P1000L-PQG208 Datasheet - Page 16

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A3P1000L-PQG208

Manufacturer Part Number
A3P1000L-PQG208
Description
FPGA - Field Programmable Gate Array 1M SYSTEM GATES
Manufacturer
Actel
Datasheet

Specifications of A3P1000L-PQG208

Processor Series
A3P1000
Core
IP Core
Maximum Operating Frequency
781.25 MHz
Number Of Programmable I/os
154
Data Ram Size
147456
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
1 M
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3P1000L-PQG208
Manufacturer:
Microsemi SoC
Quantity:
10 000
ProASIC3L DC and Switching Characteristics
Table 2-2 •
Table 2-3 •
2 - 2
Symbol
T
T
VCC
VJTAG
VPUMP
VCCPLL
VCCI
VMV
Notes:
1. All parameters representing voltages are measured with respect to GND unless otherwise specified.
2. The ranges given here are for power supplies only. The recommended input voltage ranges specific to each I/O
3. V
4. For ProASIC
5. VMV pins must be connected to the corresponding VCCI pins. See the "Pin Descriptions" chapter of the
6. VCCPLL pins should be tied to VCC pins. See the "Pin Descriptions" chapter of the
7. 3.3 V wide range is compliant to the JDEC8a specification and supports 3.0 V V
Product
Grade
Commercial
Industrial
Notes:
1. This is a stress rating only; functional operation at any condition other than those indicated is not implied.
2. These limits apply for program/data retention only. Refer to
A
J
standard are given in
FPGA Fabric User’s Guide
Guide
conditions and absolute limits.
PUMP
2
5
3
6
for further information.
can be left floating during normal operation (not programming mode).
and
Recommended Operating Conditions
Flash Programming Limits – Retention, Storage, and Operating Temperature
®
3L devices, V
Ambient temperature
Junction Temperature
1.2 V–1.5 V wide range core voltage
JTAG DC voltage
Programming voltage
Analog power supply (PLL)
1.2 V DC supply voltage
1.5 V DC supply voltage
1.8 V DC supply voltage
2.5 V DC supply voltage
3.3 V wide range DC supply voltage
3.3 V DC supply voltage
LVDS differential I/O
LVPECL differential I/O
Programmin
Cycles
500
500
g
Table 2-13 on page
for further information.
CCI
Program Retention
(biased/unbiased)
V
CC
.
20 years
20 years
Parameter
4
2-10. V
Programming Mode
Operation
1.2 V–1.5 V wide range
core voltage
CCI
7
should be at the same voltage within a given I/O bank.
1
Temperature T
R e vi s i o n 9
Maximum Storage
3
Table 2-1 on page 2-1
110
110
STG
(°C)
1.425 to 1.575
2.375 to 2.625
1.14 to 1.575
1.14 to 1.575
Commercial
3.15 to 3.45
1.14 to 1.26
0 to + 85
1.4 to 3.6
0 to 3.45
1.7 to 1.9
2.3 to 2.7
2.7 to 3.6
3.0 to 3.6
3.0 to 3.6
CCI
0 to +70
2
operation.
Junction Temperature T
and
ProASIC3L FPGA Fabric User’s
Table 2-2
Maximum Operating
1.425 to 1.575
2.375 to 2.625
1.14 to 1.575
1.14 to 1.575
–40 to +100
3.15 to 3.45
1.14 to 1.26
Industrial
–40 to +85
1
1.4 to 3.6
0 to 3.45
1.7 to 1.9
2.3 to 2.7
2.7 to 3.6
3.0 to 3.6
3.0 to 3.6
for device operating
100
100
ProASIC3L
J
Units
(°C)
°C
°C
V
V
V
V
V
V
V
V
V
V
V
V
V
2

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