A3P1000L-PQG208 Actel, A3P1000L-PQG208 Datasheet - Page 69

• Manufacturer Part Number: A3P1000L-PQG208
• Description: FPGA - Field Programmable Gate Array 1M SYSTEM GATES
• Manufacturer: Actel

Specifications of A3P1000L-PQG208

• Processor Series: A3P1000
• Core: IP Core
• Maximum Operating Frequency: 781.25 MHz
• Number Of Programmable I/os: 154
• Data Ram Size: 147456
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Gates: 1 M
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-78 • Minimum and Maximum DC Input and Output Levels
Table 2-79 • Minimum and Maximum DC Input and Output Levels
1.8 V
LVCMOS
Drive
Strength
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
Notes:
1. Currents are measured at 100°C junction temperature and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
1.8 V
LVCMOS
Drive
Strength
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
Notes:
1. Currents are measured at 100°C junction temperature and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
Min.
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
1.8 V LVCMOS
Low-voltage CMOS for 1.8 V is an extension of the LVCMOS standard (JESD8-5) used for general-
purpose 1.8 V applications. It uses a 1.8 V input buffer and a push-pull output buffer.
Min.
V
Applicable to Pro I/Os
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
Applicable to Advanced I/O Banks
V
VIL
0.35 * VCCI 0.65 * VCCI
0.35 * VCCI 0.65 * VCCI
0.35 * VCCI 0.65 * VCCI
0.35 * VCCI 0.65 * VCCI
0.35 * VCCI
0.35 * VCCI 0.65 * VCCI
0.35 * VCCI
0.35 * VCCI
0.35 * VCCI
0.35 * VCCI
0.35 * VCCI
0.35 * VCCI
VIL
Max.
Max.
V
V
0.65 * V
0.65 * VCCI
0.65 * VCCI
0.65 * VCCI
0.65 * VCCI
0.65 * VCCI
0.65 * VCCI
Min.
Min. V
V
VIH
CCI
VIH
Max.
1.9
1.9
1.9
1.9
1.9
1.9
V
Max.
1.9
1.9
1.9
1.9
1.9
1.9
V
Max.
VOL
R e v i s i o n 9
0.45
0.45
0.45
0.45
0.45
0.45
Max.
V
VOL
0.45
0.45
0.45
0.45
0.45
0.45
V
VCCI – 0.45
VCCI – 0.45
VCCI – 0.45
VCCI – 0.45
VCCI – 0.45 12 12
VCCI – 0.45 16 16
VCCI – 0.45
VCCI – 0.45
VCCI – 0.45
VCCI – 0.45
VCCI – 0.45 12 12
VCCI – 0.45 16 16
VOH
Min.
V
VOH
Min.
V
mA mA
I
OL
6
2
4
8
mA mA
I
OL
2
4
6
8
I
OH
6
2
4
8
ProASIC3L Low Power Flash FPGAs
I
OH
2
4
6
8
Max.
mA
I
OSL
91
91
17
35
45
9
Max.
mA
I
OSL
17
35
45
91
91
1
9
1
Max.
I
mA
Max.
OSH
I
mA
22
44
51
74
74
11
OSH
74
11
22
44
51
74
1
1
µA
µA
I
10
10
10
10
10
10
I
10
10
10
10
10 10
10
IL
IL
2
2
µA
µA
2- 55
I
I
10
10
10
10
10
10
10
10
10
10
10
IH
IH
2
2