A3P1000L-PQG208 Actel, A3P1000L-PQG208 Datasheet - Page 91

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A3P1000L-PQG208

Manufacturer Part Number
A3P1000L-PQG208
Description
FPGA - Field Programmable Gate Array 1M SYSTEM GATES
Manufacturer
Actel
Datasheet

Specifications of A3P1000L-PQG208

Processor Series
A3P1000
Core
IP Core
Maximum Operating Frequency
781.25 MHz
Number Of Programmable I/os
154
Data Ram Size
147456
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
1 M
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3P1000L-PQG208
Manufacturer:
Microsemi SoC
Quantity:
10 000
Table 2-128 • Minimum and Maximum DC Input and Output Levels
Figure 2-13 • AC Loading
Table 2-129 • AC Waveforms, Measuring Points, and Capacitive Loads
3.3 V GTL
Drive
Strength
25 mA
Notes:
1. Currents are measured at 100°C junction temperature and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Output drive strength is below JEDEC specification.
Input Low (V)
VREF – 0.05
*
Measuring point = V
3
Min.
Voltage-Referenced I/O Characteristics
3.3 V GTL
Gunning Transceiver Logic is a high-speed bus standard (JESD8-3). It provides a differential amplifier
input buffer and an open-drain output buffer. The V
–0.3
V
VREF – 0.05 VREF + 0.05
VIL
Input High (V)
trip
VREF + 0.05
Max.
. See
V
Table 2-15 on page 2-12
Min.
V
Measuring
VIH
Point* (V)
Test Point
0.8
Max.
3.6
V
GTL
for a complete table of trip points.
R e v i s i o n 9
Max.
VOL
VREF (typ.) (V)
0.4
V
V
TT
CCI
25
10 pF
0.8
pin should be connected to 3.3 V.
VOH
Min.
V
mA mA
I
OL
25 25
I
VTT (typ.) (V)
OH
ProASIC3L Low Power Flash FPGAs
1.2
Max.
mA
I
268
OSL
1
Max.
I
mA
181
OSH
C
1
LOAD
10
µA
I
10
(pF)
IL
2
µA
2- 77
I
10
IH
2

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