LFXP3C-3TN100I Lattice, LFXP3C-3TN100I Datasheet - Page 265
LFXP3C-3TN100I
Manufacturer Part Number
LFXP3C-3TN100I
Description
FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I
Manufacturer
Lattice
Specifications of LFXP3C-3TN100I
Number Of Programmable I/os
62
Data Ram Size
55296
Supply Voltage (max)
3.465 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.71 V
Package / Case
TQFP-100
Package
100TQFP
Family Name
LatticeXP
Device Logic Units
3000
Maximum Internal Frequency
320 MHz
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Maximum Number Of User I/os
62
Ram Bits
55296
Re-programmability Support
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP3C-3TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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LatticeECP/EC and LatticeXP
Lattice Semiconductor
sysCLOCK PLL Design and Usage Guide
Figure 11-7. Configuration Tab
Divider Mode: In this mode, the user sets the input frequency and divider settings. It is assumed the user is famil-
iar with the PLL operation. The user must choose the CLKOP Divider value to maximize the f
to achieve opti-
VCO
mum PLL performance. After input frequency and divider settings are set, clicking the ‘Calculate’ button will display
the output frequencies. If the divider settings are out of the PLL specification, the software will generate an error.
EHXPLLB Example Projects
ispLEVER provides example PLL projects for first time PLL users.
In the ispLEVER Project Navigator, go to the File menu and select Open Examples....
Select the FPGA folder. The LatticeEC and LatticeXP folders include PLL example projects in both Verilog and
VHDL.
11-9
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