UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 112
UPD78F0413GA-GAM-AX
Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet
1.UPD78F0413GA-GAM-AX.pdf
(562 pages)
Specifications of UPD78F0413GA-GAM-AX
Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal
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(3) Setting of operation mode for subsystem clock pin
112
Note The main clock mode register (MCM) is used to set the main system clock supplied to CPU clock (high-
Caution
The operation mode for the subsystem clock pin can be set by using bit 4 (OSCSELS) of the clock operation
mode select register (OSCCTL) in combination.
f
f
f
f
f
f
XP
XP
XP
XP
XP
SUB
CPU Clock (f
/2
/2
/2
/2
/2
2
3
4
speed system clock/internal high-speed oscillation clock) (see Figure 5-6).
Table 5-2. Relationship Between CPU Clock and Minimum Instruction Execution Time
Bit 4 of OSCCTL
Confirm that bit 5 (CLS) of the processor clock control register (PCC) is 0 (CPU is operating
with main system clock) when changing the current values of OSCSELS.
OSCSELS
CPU
)
0
1
Table 5-3. Setting of Operation Mode for Subsystem Clock Pin
0.2 s
0.4 s
0.8 s
1.6 s
3.2 s
High-Speed System Clock
At 10 MHz Operation
CHAPTER 5 CLOCK GENERATOR
Input port mode
XT1 oscillation mode
Subsystem Clock Pin
User’s Manual U18698EJ1V0UD
Main System Clock
Operation Mode
Note
Minimum Instruction Execution Time: 2/f
0.25 s (TYP.)
0.5 s (TYP.)
1.0 s (TYP.)
2.0 s (TYP.)
4.0 s (TYP.)
At 8 MHz (TYP.) Operation
Internal High-Speed
Oscillation Clock
Input port
Crystal resonator connection
P123/XT1 Pin
Note
122.1 s
CPU
At 32.768 kHz Operation
Subsystem Clock
P124/XT2 Pin
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