PIC12F629-E/MD Microchip Technology, PIC12F629-E/MD Datasheet - Page 78
PIC12F629-E/MD
Manufacturer Part Number
PIC12F629-E/MD
Description
1.75KB Flash, 64 RAM, 6 I/O 8 DFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F629T-ISN.pdf
(136 pages)
2.PIC12F629T-ISN.pdf
(8 pages)
3.PIC12F629T-ISN.pdf
(24 pages)
Specifications of PIC12F629-E/MD
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164326 - MODULA SKT PM3 20QFN
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC12F629/675
RLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
RRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS41190G-page 78
Rotate Left f through Carry
[ label ] RLF
0 f 127
d [0,1]
See description below
C
The contents of register ‘f’ are rotated
one bit to the left through the Carry
Flag. If ‘d’ is 0, the result is placed in
the W register. If ‘d’ is 1, the result is
stored back in register ‘f’.
Rotate Right f through Carry
[ label ]
0 f 127
d [0,1]
See description below
C
The contents of register ‘f’ are
rotated one bit to the right through
the Carry Flag. If ‘d’ is 0, the result
is placed in the W register. If ‘d’ is
1, the result is placed back in
register ‘f’.
[ label ] SLEEP
None
00h WDT,
0 WDT prescaler,
1 TO,
0 PD
TO, PD
The power-down Status bit, PD is
cleared. Time-out Status bit, TO
is set. Watchdog Timer and its
prescaler are cleared.
The processor is put into Sleep
mode with the oscillator stopped.
C
C
RRF f,d
f,d
Register f
Register f
SUBLW
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SUBWF
Syntax:
Operands:
Operation:
Status
Affected:
Description:
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Subtract W from f
[ label ] SUBWF f,d
0 f 127
d [0,1]
(f) - (W) destination)
C, DC, Z
Subtract (2’s complement method)
W register from register ‘f’. If ‘d’ is
0, the result is stored in the W
register. If ‘d’ is 1, the result is
stored back in register ‘f’.
[ label ] SUBLW k
0 k 255
k - (W) W)
The W register is subtracted (2’s
complement method) from the
eight-bit literal ‘k’. The result is
placed in the W register.
Subtract W from Literal
Swap Nibbles in f
[ label ] SWAPF f,d
0 f 127
d [0,1]
(f<3:0>) (destination<7:4>),
(f<7:4>) (destination<3:0>)
None
The upper and lower nibbles of
register ‘f’ are exchanged. If ‘d’ is
0, the result is placed in the W
register. If ‘d’ is 1, the result is
placed in register ‘f’.
2010 Microchip Technology Inc.
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