MC68040FE33A Freescale Semiconductor, MC68040FE33A Datasheet - Page 257

IC MICROPROCESSOR 32BIT 184-CQFP

MC68040FE33A

Manufacturer Part Number
MC68040FE33A
Description
IC MICROPROCESSOR 32BIT 184-CQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68040FE33A

Processor Type
M680x0 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
184-CQFP
Package
184CQFP
Processor Series
M680xx
Core
CPU32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68040FE33A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor, Inc.
precision mode is selected, the exponent value is in the correct range even if it is stored in
extended-precision format. If the destination is a memory location, the FPSR PREC bits
are ignored. In this case, a number in the extended-precision format is taken from the
source floating-point data register, rounded to the destination format precision, and then
written to memory.
Depending on the selected rounding mode or destination data format in effect, the location
of the least significant bit of the mantissa and the locations of the guard, round, and sticky
bits in the 67-bit intermediate result mantissa varies. The guard and round bits are always
calculated exactly. The sticky bit is used to create the illusion of an infinitely wide
intermediate result. As the arrow illustrates in Figure 9-7, the sticky bit is the logical OR of
all the bits in the infinitely precise result to the right of the round bit. During the calculation
stage of an arithmetic operation, any non-zero bits generated that are to the right of the
round bit set the sticky bit to one. Because of the sticky bit, the rounded intermediate
result for all required IEEE arithmetic operations in the RN mode is in error by no more
than one-half unit in the last place.
9.4.2 Rounding The Result
Range control is the process of rounding the mantissa of the intermediate result to the
specified precision and checking the 16-bit intermediate exponent to ensure that it is
within the representable range of the selected rounding-precision format. Range control
ensures correct emulation of a device that only supports single- or double-precision
arithmetic. If the intermediate result’s exponent exceeds the range of the selected
precision, the exponent value appropriate for an underflow or overflow is stored as the
result in the 16-bit extended-precision format exponent. For example, if the data format
and rounding mode is single-precision RM and the result of an arithmetic operation
overflows the magnitude of the single-precision format, the largest normalized single-
precision value is stored as an extended-precision number in the destination floating-point
data register (i.e., an unbiased 15-bit exponent of $00FF and a mantissa of
$FFFFFF0000000000). If an infinity is the appropriate result for an underflow or overflow,
the infinity value for the destination data format is stored as the result (i.e., an exponent
with the maximum value and a mantissa of zero).
Figure 9-8 illustrates the algorithm that is used to round an intermediate result to the
selected rounding precision and destination data format. If the destination is a floating-
point data register, either the selected rounding precision specified by the FPCR PREC
bits or by the instruction itself determines the rounding boundary. For example, FSADD
and FDADD specify single- and double-precision rounding regardless of the precision
specified in the FPCR PREC bits. If the destination is external memory or an integer data
register, the destination data format determines the rounding boundary. If the rounded
result of an operation is not exact, then the INEX2 bit is set in the FPSR EXC byte.
MOTOROLA
M68040 USER’S MANUAL
9- 13
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