MC68040FE33A Freescale Semiconductor, MC68040FE33A Datasheet - Page 266

• Manufacturer Part Number: MC68040FE33A
• Description: IC MICROPROCESSOR 32BIT 184-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68040FE33A

• Processor Type: M680x0 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Package: 184CQFP
• Processor Series: M680xx
• Core: CPU32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

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effective address in the stack frame. The saved PC value is the logical address of the
instruction that follows the unimplemented floating-point instruction. The processor
generates exception vector number 11 for the unimplemented F-line instruction exception
vector, fetches the address of the F-line exception handler from the processor’s exception
vector table, pushes the format $2 stack frame on the system stack, and begins execution
of the exception handler after prefetching instructions to fill the pipeline. The exception
handler emulates the unimplemented floating-point instruction in software, maintaining
user-object-code compatibility. Refer to Section 8 Exception Processing for details
about exception vectors and format $2 stack frames.
The F-line exception handler checks for the format $2 stack frame to distinguish an
unimplemented floating-point instruction from other F-line unimplemented instructions.
When the exception handler for unimplemented floating-point instructions executes an
FSAVE, a 26-word unimplemented instruction state frame is created (see Figure 9-10). At
this point, an FSAVE instruction yields the information as listed in Table 9-16. Note that
unless the instruction specifies a packed decimal real source, the state frame contains
both operands (if required). For packed decimal real data format, the second operand is in
the designated format of the destination floating-point data register.
The exception handler uses the information provided in the state frame to determine the
instruction that it needs to emulate and the input operands to that instruction. Once the
instruction has been emulated and the result is reached, the exception handler moves the
result into the appropriate destination floating-point data register, discards the
unimplemented instruction state frame, and returns to normal instruction flow using the
RTE instruction. The limitation to this approach is that no floating-point arithmetic
exceptions can be reported at the end of the emulated instruction.
The M68040FPSP not only emulates the instruction, but in addition, it ensures that if any
floating-point arithmetic exceptional conditions arise from the emulation of the
unimplemented instruction and if the corresponding floating-point arithmetic exception is
enabled, the M68040FPSP manipulates the stack and restores the stack back into the
FPU in the desired exceptional state. This effectively imitates the action of the MC68040
implemented instructions since the exception is not reported until the next floating-point
instruction is encountered. This manipulation of the stack is rather complicated and is
beyond the scope of this manual. Motorola recommends that the user utilize the
M68040FPSP if a full exception-reporting model is required. Motorola does not provide
any printed documentation other than what is embedded in the source code of the
M68040FPSP.
9.6.2 Unsupported Floating-Point Data Types
An unsupported data type exception occurs when either operand to an implemented
floating-point instruction is denormalized (for single-, double-, and extended-precision
operands), unnormalized (for extended-precision operands), or either the source or
destination data format is packed decimal real. These data types are unimplemented in
the MC68040 and must be emulated in software.
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M68040 USER’S MANUAL
MOTOROLA
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