MC68040FE33A Freescale Semiconductor, MC68040FE33A Datasheet - Page 332

IC MICROPROCESSOR 32BIT 184-CQFP

MC68040FE33A

Manufacturer Part Number
MC68040FE33A
Description
IC MICROPROCESSOR 32BIT 184-CQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68040FE33A

Processor Type
M680x0 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
184-CQFP
Package
184CQFP
Processor Series
M680xx
Core
CPU32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68040FE33A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
11.6 OUTPUT AC TIMING SPECIFICATIONS
NOTES:
11-4
28 3,4,5 BCLK to Multiplexed Address
20 3,4
27 3,5
29 4,5
Num
1. Output timing is specified for a valid signal measured at the pin. Large buffer timing is specified driving a 50
2. Small buffer timing is specified driving an unterminated 30
3. Timing specifications 11, 20, and 38 for address bus output timing apply when normal bus operation is selected.
4. Timing specifications 18 and 19 for data bus output timing apply when normal bus operation is selected.
5. Timing specifications 21, 27, 28, and 29 are measured from BCLK edges. By design, the MC68040 cannot drive
11 3
18 4
19 4
21 5
26 3
30 4
38 3
12
13
14
39
40
43
48
50
transmission line with a length characterized by a 2.5-ns one-way propagation delay, terminated through 50
2.5 V. Large buffer output impedance is 4–12
large buffer outputs must be terminated to guarantee operation.
2.5 ns one-way propagation delay. Small buffer output impedance is typically 30
include approximately 5 ns for the signal to propagate the length of the transmission line and back.
Specifications 26, 27, and 28 should be used when the multiplexed bus mode of operation is enabled.
Specifications 28 and 29 should be used when the multiplexed bus mode of operation is enabled.
address and data simultaneously during multiplexed operations.
BCLK to Address CIOUT, LOCK ,
LOCKE, R/ W, SIZx, TLN, TMx, TTx,
UPAx Valid
BCLK to Output Invalid
(Output Hold)
BCLK to TS Valid
BCLK to TIP Valid
BCLK to Data Out Valid
BCLK to Data Out Invalid (Output
Hold)
BCLK to Output Low Impedance
BCLK to Data-Out High Impedance
BCLK to Multiplexed
Address Valid
BCLK to Multiplexed
Address Driven
High Impedance
BCLK to Multiplexed
Data Driven
BCLK to Multiplexed Data Valid
BCLK to Address, CIOUT , LOCK,
LOCKE, R/ W, SIZx, TS, TLNx, TMx,
TTx, UPAx High Impedance
BCLK to BB, TA, TIP
High Impedance
BCLK to BR , BB Valid
BCLK to MI Valid
BCLK to TA Valid
BCLK to IPEND, PSTx, RSTO Valid
Characteristic
Freescale Semiconductor, Inc.
For More Information On This Product,
M68040 USER’S MANUAL
Go to: www.freescale.com
Min Max Min Max Min Max Min Max Min Max Min Max Unit
19
19
19
19
19
9
9
9
Large 1
9
9
9
9
9
9
9
9
9
9
9
, resulting in incident wave switching for this environment. All
21
21
21
31
18
18
28
21
21
21
21
23
20
33
25 MHz
19
19
19
19
19
Small 2
9
9
9
9
9
9
9
9
9
9
9
9
9
9
transmission line with a length characterized by a
30
30
30
32
40
18
18
28
30
30
30
30
20
42
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
14
14
14
14
14
(See Figures 11-3 to 11-7)
Large 1
26
18
18
18
18
18
18
20
17
15
20
28
15
23
18
33 MHz
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
6.50
14
14
14
14
14
Small 2
; the small buffer specifications
25
25
25
27
17
33
15
20
15
23
25
25
25
25
35
11.5
5.25
5.25
5.25
5.25
5.25
5.25
5.25
5.25
5.25
5.25
5.25
5.25
5.25
5.25
13
13
13
13
Large 1
16
16
17
18
16
25
14
19
14
22
16
17
17
17
27
40 Mhz
MOTOROLA
5.25
5.25
5.25
5.25
5.25
5.25
5.25
5.25
5.25
5.25
11.5
5.25
5.25
5.25
5.25
13
13
13
13
Small 2
32
19
24
24
24
26
16
14
34
14
22
24
24
24
24
to
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for MC68040FE33A