STM32F407IGH6 STMicroelectronics, STM32F407IGH6 Datasheet - Page 67

Microcontrollers (MCU) ARM M4 1024 FLASH 168 Mhz 192kB SRAM

STM32F407IGH6

Manufacturer Part Number
STM32F407IGH6
Description
Microcontrollers (MCU) ARM M4 1024 FLASH 168 Mhz 192kB SRAM
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F407IGH6

Core
ARM Cortex M4
Processor Series
STM32F4
Data Bus Width
32 bit
Maximum Clock Frequency
168 MHz
Program Memory Size
1024 KB
Data Ram Size
192 KB
On-chip Adc
Yes
Number Of Programmable I/os
140
Number Of Timers
10
Operating Supply Voltage
1.7 V to 3.6 V
Package / Case
UFBGA-176
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, I2C, I2S, SPI, UART
Program Memory Type
Flash
Lead Free Status / Rohs Status
 Details

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STM32F405xx, STM32F407xx
Table 12.
1. The number of wait states can be reduced by reducing the CPU frequency.
2. If an inverted reset signal is applied to PDR_ON, this value can be lowered to 1.7 V when the device operates in a reduced
3. Prefetch is not available. Refer to AN3430 application note for details on how to adjust performance and power.
4. Thanks to the ART accelerator and the 128-bit Flash memory, the number of wait states given here does not impact the
5. The voltage range for OTG USB FS can drop down to 2.7 V. However it is degraded between 2.7 and 3 V.
V
2.1 V
V
2.4 V
V
2.7 V
V
3.6 V
Operating
DD
DD
DD
DD
supply
temperature range (0 to 70 °C).
execution speed from Flash memory since the ART accelerator allows to achieve a performance equivalent to 0 wait state
program execution.
power
range
= 2.1 to
= 2.4 to
= 2.7 to
=1.8 to
(2)
(5)
Limitations depending on the operating power supply range
Conversion
Conversion
Conversion
Conversion
operation
time up to
time up to
time up to
time up to
1.2 Msps
1.2 Msps
2.4 Msps
2.4 Msps
ADC
memory wait
memory wait
memory wait
memory wait
16 MHz with
18 MHz with
24 MHz with
30 MHz with
frequency
(f
Maximum
memory
no Flash
no Flash
no Flash
no Flash
access
Flashmax
state
Flash
state
state
state
(3)
)
Doc ID 022152 Rev 2
maximum CPU
Number of wait
frequency
states at
7
7
6
5
(3)(4)
(4)
(4)
(4)
(1)
– Degraded
– No I/O
– Degraded
– No I/O
– Degraded
– I/O
– Full-speed
– I/O
I/O operation
speed
performance
compensation
speed
performance
compensation
speed
performance
compensation
works
operation
compensation
works
up to 30 MHz
up to 30 MHz
up to 48 MHz
– up to
– up to
frequency for
synchronous
Electrical characteristics
FSMC_CLK
60 MHz
when V
3.0 to 3.6 V
48 MHz
when V
2.7 to 3.0 V
Maximum
accesses
DD
DD
=
=
8-bit erase
and program
operations
only
16-bit erase
and program
operations
16-bit erase
and program
operations
32-bit erase
and program
operations
operations
Possible
memory
Flash
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