YMF721-S Yamaha, YMF721-S Datasheet



Manufacturer Part Number
YMF721 OPL4-ML2 FM + Wavetable Synthesizer LSI

Specifications of YMF721-S


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Part Number:
Part Number:
6 700
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YMF721 (OPL4-ML2) is a high quality and low cost Wavetable synthesizer LSI. YMF721 (OPL4-ML2)
integrates an OPL3 (FM synthesizer), General MIDI processor and 1 Mbyte Wavetable sample ROM into one
chip, and complies with General MIDI (GM) system level 1. Thus, it is best suited to multimedia applications,
sound cards, MIDI synthesis modules and other sound applications.
Since this LSI outputs stereophonic 16 bit digital signal (fs = 44.1 kHz), it can be connected directly with
YMF701B, 711 or 715 (OPL3-SA, SA2 or SA3) or with YAC516(DAC16-L).
Operating voltage, 3.3 V, allows this LSI to be controlled with notebook personal computers.
Power management functions (power down and suspend/resume functions) of OPL4-ML2 contribute to low
power consumption of personal computers into which this product is built-in.
• The Wavetable synthesizer of this LSI is able to generate up to 24 types of sounds simultaneously.
• Has an interface that makes this LSI compatible with MPU-401 UART mode.
• Has an OPL3 (FM synthesizer) for AdLib/Sound Blaster applications.
• Has a 1 Mbyte built-in Wavetable sample ROM.
• Complies with GM system Level 1. (Thus, it is compatible with DOS applications that support MPU-401.)
• MIDI signal can be transmitted either through serial input or parallel input.
• FM synthesizer and Wavetable synthesizer of this LSI can generate their sound at the same time.
• FM synthesizer is register-compatible with OPL3.
• All registers are readable.
• Power management functions included power down and suspend/resume can be supported.
• Frequency of master clock signal is 33.8688 MHz.
• Pin compatible with YMF704C-S (100 pin SQPF)
• Voltage of power supply can be 5.0 V or 3.3 V.
• Silicone gate CMOS process
• 100-pin SQFP (YMF721-S).
GENERAL MIDI logo is a trademark of Association of Musical Electronics Industry (AMEI), and
indicates GM system level 1 Compliant.
FM + Wavetable Synthesizer LSI
Jury 10, 1997
July 10, 1997

YMF721-S Summary of contents

Page 1

... Pin compatible with YMF704C-S (100 pin SQPF) • Voltage of power supply can be 5 3.3 V. • Silicone gate CMOS process • 100-pin SQFP (YMF721-S). GENERAL MIDI logo is a trademark of Association of Musical Electronics Industry (AMEI), and indicates GM system level 1 Compliant. YAMAHA CORPORATION ...

Page 2

... YMF721 PIN CONFIGURATION YMF721-S VDD 1 N.C. 2 N.C. 3 N.C. 4 N.C. 5 N.C. 6 N.C. 7 N.C. 8 N.C. 9 N.C. 10 N.C. 11 N.C. 12 N.C. 13 N.C. 14 N.C. 15 N.C. 16 N.C. 17 N.C. 18 N.C. 19 N.C. 20 N.C. 21 N.C. 22 N.C. 23 N.C. 24 VSS 25 100 pin SQFP Top View - VSS 74 N.C. 73 N.C. 72 N.C. 71 N.C. 70 N.C. 69 N.C. 68 N.C. 67 N.C. 66 N.C. 65 N.C. 64 VSS 63 VDD 62 N.C. 61 VSS 60 /TEST2 59 /RESETSEL 58 TD7 57 TD6 56 TD5 55 TD4 54 TD3 ...

Page 3

... TTL - Read enable TTL - Initial clear input TTL 2mA Interrupt signal ("H" : Interrupt) TTL 2mA Selection of data transfer direction (“L” : YMF721®Host) TTL 12mA I/O channel ready/busy selection ("L" : Busy) Type Size Function TTL - MIDI serial data input TTL - Selection of MIDI serial/parallel transmission (“ ...

Page 4

... YMF721 Others : 39 pins Pin name pins I/O 5V/ /RESETSEL 1 I+ /PDOUT N. LSI test pins : 21 pins Pin name pins I/O /TESTA 1 I+ /TESTB 1 I+ /TEST 1 I+ /TEST2 1 I+ /TEST3 TD7-0 8 I/O Power supply, ground : 11 pins Pin name pins I/O VDD ...

Page 5

... YMF721 BLOCK DIAGRAM ADB[7-0] ISA BUS A[2-0] Interface /MPUCS,/OPLCS /IOW,/IOR Decode RST Logic /RESETSEL FSP RXD Timing XI Generator XO Micro Processor MIDI Interpreter Command Interpreter Register Synthesizer Control UART Interface (MPU/Command (arbitration etc.) /Control) SRAM ROM 32kbit 256kbit - 5 - TEST Wave ROM ...

Page 6

... CLKO pin of YMF7xx (OPL3-SAx). For other methods, a crystal oscillator can be used by attaching and XO pins of YMF721 (OPL4-ML clock of 33.8688 MHz supplied from the system can be used. When serial data outputs of YMF721 (OPL4-ML2), BCO, LRO and DO2 pins, are connected with external serial data interface (BCLK_ML, LRCK_ML, SIN_ML) of YMF7xx (OPL3-SAx), the serial data is converted to analog signal in YMF7xx (OPL3-SAx) and outputted as analog signal ...

Page 7

... CLKO directly to YAC516 (DAC16-L) as shown to convert serial data output to analog signal. Then recommended to input the converted analog signal to AUX2L and AUX2R of YMF7xx (OPL3-SAx) after amplifying the volume of source of YMF721 through the gain of + shown for the purpose of equalizing the volumes of multiple sources. ...

Page 8

... As a source of master clock for YMF721 (OPL4-ML2), use a crystal oscillator by connecting and XO pins, or use the clock of 33.8688 MHz from the system. Connect BCO, LRO, DO2, /PDOUT and CLKO directly to YAC516 (DAC16-L) as shown to convert serial data output to analog signal. Then recommended to amplify the volume of source of YMF721 through the suitable gain as shown for the purpose of equalizing the volumes of multiple sources ...

Page 9

... YMF721 2. ISA bus interface 8 bit parallel I/O of YMF721 (OPL4-ML2) can be connected with ISA bus. The ISA bus interface allows transfer of commands between the each block of YMF721 (OPL4-ML2) and host. Data Bus & Address Bus ADB7-0 : ISA data bus A2-0 : ISA address bus /MPUCS ...

Page 10

... Interrupt AIRQ : Interrupt signal ("H" : Interrupt) YMF721 (OPL4-ML2) is able to provide one interrupt signal. There are two types of sources of this interrupt signal as follows. 1) Two timer flags that are used for tempo counter of FM synthesizer 2) The flag that occurs when internal processor writes data into the Command response register The flags described disabled as a default ...

Page 11

... Disabling synthesizer's internal clock 2) Setting GBUSY bit of status register to "0". YMF721 (OPL4-ML2) requires over 30 msec to complete the above processes before going into the power down mode. Since generation of the clock has been disabled, recovery from the power down mode can not be made by using command ...

Page 12

... Power down sequence when connected with ISA bus 5-1-2. No ISA BUS Connect System When YMF721 (OPL4-ML2) is not connected with ISA bus, power down operation can be controlled by sending Yamaha's original System Exclusive Message as the MIDI data. The System Exclusive Message includes the following three byte ID. ...

Page 13

... Write register that has been read after turning on and resetting at the recovery sequence. For the details of suspend/resume, refer to 6-3. Note : The system that includes YMF721 not connected with ISA bus can not support the suspend/resume function. <Power Down out> Synthesizer clock enable ~3msec ...

Page 14

... DRR bit of the status register. An interrupt occurs in the internal processor when MIDI data has been written into the register. Since YMF721 (OPL4-ML2) has no output signal for transmitting MIDI data, the MIDI data written into this register is used to operate internal Wavetable synthesizer ...

Page 15

... YMF721 6-2. Command/Response register I/O port for power down and suspend/resume register is described here. Command/Response Port (R/W): port D7 OPL_Base + 6 OPL_Base + 6 Command Write... Response Read... Note : For the details of Command/Response, refer to 6-3. 6-3. Details of command register Some of commands supported in the command register are as follows. Command Sub Command Command Length Response Length ...

Page 16

... Command E0h when it confirms that the data has been received normally. 6-3-3. Others YMF721(OPL4-ML2) can use the following special commands that do not send response. 1) Command FDh : Power down mode Refer to 5-1. When the power down command FDh has been written into the command register, do not write any command before the return command to the control register has been executed ...

Page 17

... Setting this bit to "0" initializes internal processor. Default value of this bit is "1". This bit shows connection of internal bus of YMF721(OPL4- ML2). Default value of this bit is "1". “1” : Connecting synthesizer and internal processor “0” : Connecting synthesizer and ISA bus Indicates that a response to a command has been received ...

Page 18

... YMF721 6-5. FM synthesizer registers 6-5-1. Status register Status Register (RO): port D7 IRQ OPL_Base + 0 Note : Since NEW2 (index 05h of Register array1 default state, both LD and BUSY0 bits are valid. (LD and BUSY0 bits are invalid when NEW2=0.) BUSY0 is a BUSY flag for both FM and Wavetable registers. ...

Page 19

... YMF721 Data Register Array 1 (R/W) Index 01h 04h - - 05h - - 20 - 35h AM VIB 40 - 55h KSL 60 - 75h 80 - 95h A0 - A8h B0 - B8h - - C0 - C8h CHD CHC E0 - F5h - - Default : After initial clear, all the bits of Register Array 1 are cleared to "0" except NEW2 and NEW3 bits of index 05h, and CHA and CHB bits of index C0-C8h. ...

Page 20

... YMF721 6-6. Wavetable synthesizer register 6-6-1. Status register Status Register (RO): port D7 - OPL_Base + 4 6-6-2. Data register Data Register (R/W): Index 01h 02h DEVICE ID (“0” “1” “0”) 03h 04h 05h 06h 08-1Fh 20-37h 38-4Fh 50-67h 68-7Fh KEYON DAMP 80-97h CHORUS SEND 98-AFh B0-C7h ...

Page 21

... Data Bus Connect System Data BUS Since driving current of data bus, ADB7-0 pins, of YMF721(OPL4-ML2) is about 2 mA (at VDD = 5.0 V recommended to use bus buffer such as LS245 as necessary. At this time, connect ABDIR pin which outputs bus direction signal of YMF721(OPL4-ML2) with DIR (direction) pin of the bus buffer such as LS245 ...

Page 22

... YMF721 7-4. Others Power Supply It is recommended to install a line noise filter in the YMF721 (OPL4-ML2). Be sure to install 0.1uF ceramic capacitor between each of VDD pins and VSS pins as close to the pins as possible, especially the pin No. 63 (VDD). 5V/3V When operating YMF721 (OPL4-ML2) with 5 V, 5V/3V pin must be pulled up. When operating it with 3.3 V, set the pin to " ...

Page 23

... YMF721 Electrical Characteristics Absolute Maximum Ratings Item Power Supply Voltage (Analog/Digital) Input Voltage Output Voltage Input Current Storage Temperature Notes : V =DV = Recommended Operating Conditions Item Operating voltage 1 (5.0V Spec. 5V/3V=“H”) Operating voltage 2 (3.3V Spec. 5V/3V=“L”) Operating Ambient Temperature Notes : DV ...

Page 24

... YMF721 AC Characteristics 1. CPU interface (Refer to Fig Item Address set up to /IOW, /IOR active Address hold to /IOW, /IOR inactive /IOW Write Pulse Width Write Data set up to /IOW active Write Data hold to /IOW inactive /IOR Read Pulse Width Read Data access time ...

Page 25

... YMF721 I/O write cycle A2-0 /***CS /IOW ADB7-0 I/O read cycle A2-0 /***CS /IOR ADB7 Valid WDS Fig Valid ACC Valid Fig WDH RDH July 10, 1997 ...

Page 26

... YMF721 Reset pulse width RESET Serial audio interface BCO DO3-0 LRO WCO t RST Fig.3 1/f BCK LRH LRS t t WCH WCS Fig July 10, 1997 ...

Page 27

... Sub Command 00h : Get Processor Device ID Command 80h 00h 00h The character string "GMP_OPL4" is read from ID strings. Existence of YMF721 (OPL4-ML2) can be confirmed with this character string. 3byte 11byte Get Processor Device ID 3byte ...

Page 28

... The capacity of internal processor can be known through the capacity code. bit0 = 1 : The synthesizer is able to add effects such as reverb or chorus send level 1. bit1 = 1 : Suspend/Resume is supported. bit2 = 1 :Power down is supported. YMF704B(OPL4-ML) : Capacity Code=01h YMF704B(OPL4-ML) : Capacity Code=03h YMF704C(OPL4-ML) : Capacity Code=03h YMF721C(OPL4-ML2) : Capacity Code=07h Response Command byte 84h Sub Command 02h Check sum ...

Page 29

... YMF721 Command 81h Sub Command 00h : Get OPL4-MLx Information Since the synthesizer of YMF721(OPL4-ML2) is the same as YMF295(OPL4-D), the character string of "OPL4D" is obtained as described below. Command 81h 00h 00h Command 82h These commands are used to know information about the internal Wavetable sample ROM. ...

Page 30

... YMF721 Supplementary Information 2 (MIDI Data Format) 1. General 1-1. Application The following MIDI information applies to the YMF721(OPL4-ML2). 1-2. Applicable Standards MIDI 1.0 Standard 2. Channel Message 2-1. Send YMF721(OPL4-ML2) has no transmitting function. 2-2. Receive 2-2-1. Note On/Off This is a message to inform playing information. Note On : 9nH kkH vvH Note Off : 9nH kkH 00H or 8nH kkH vvH *n : MIDI Channel No ...

Page 31

... YMF721 c) Data Entry This is a message to set control parameter data designated by RPN (Registered Parameter Number). Refer i) RPN for the relation between the parameter of RPN and the setting data. Control No Main Volume This is a message to control the volume of each part (MIDI channel). ...

Page 32

... YMF721 i) RPN This is a message to set Pitch Bend Sensitivity and Tuning of each part. After the modified parameter is designated by RPN MSB and RPN LSB, set the parameter value at Data Entry. Control No. 100 101 RPN Data Entry MSB/LSB MSB/LSB 00h 00H mmH --- ...

Page 33

... YMF721 2-2-6. Channel Mode Touch a) All Sound Off When this message is received, all sounds are muted. However, states of channel messages, that are Note ON and Hold ON etc., are kept. Control No. 120 b) Reset All Controllers When this message is received, controller etc. of the designated channel are set as shown below: ...

Page 34

... YMF721 3. System Realtime Message 3-1. System Reset <FFH> Notes of all channels are damped. Controllers of all channels become default value. 3-2. System Exclusive Message 3-2-1. GM System Level 1 ON 3-2-2. XG System ON < F7> When this message is received, Notes of all channels are damped. All setting value become default without MIDI Master Tuning. ...

Page 35

... Common Song Position Song Select Tune System Clock Real-time Commands AUX Local On/Off Messages All Sound Off All Notes Off Active Sense Reset Note : YMF721(OPL4-ML2) has no Transmitting function. Recognized 1- (Omni off Poly,) 3 Modes other than 3 are acceptable. 3 0-127 0-127 ...

Page 36

... YMF721 Supplementary Information 4 (Melody Voice List) Group Voice No. PIANO voice(00) voice(01) voice(02) voice(03) voice(04) voice(05) voice(06) voice(07) Chromatic voice(08) voice(09) voice(10) voice(11) voice(12) voice(13) voice(14) voice(15) Organ voice(16) voice(17) voice(18) voice(19) voice(20) voice(21) voice(22) voice(23) Guitar voice(24) voice(25) voice(26) voice(27) voice(28) ...

Page 37

... YMF721 Group Voice No. voice(40) voice(41) voice(42) voice(43) voice(44) voice(45) voice(46) voice(47) Ensemble voice(48) voice(49) voice(50) voice(51) voice(52) voice(53) voice(54) voice(55) Brass voice(56) voice(57) voice(58) voice(59) voice(60) voice(61) voice(62) voice(63) Reed voice(64) voice(65) voice(66) voice(67) voice(68) voice(69) voice(70) voice(71) Pipe voice(72) voice(73) ...

Page 38

... YMF721 Group Voice No. voice(88) voice(89) voice(90) voice(91) voice(92) voice(93) voice(94) voice(95) Synth Effects voice(96) voice(97) voice(98) voice(99) voice(100) voice(101) voice(102) voice(103) Ethnic voice(104) voice(105) voice(106) voice(107) voice(108) voice(109) voice(110) voice(111) Percussive voice(112) voice(113) voice(114) voice(115) voice(116) voice(117) voice(118) voice(119) Sound Effects ...

Page 39

... YMF721 Supplementary Information 5 (Drum Set List) Program # Seq Click H 25 C#0 O Brush Tap Brush Swirl L 27 D#0 Brush Slap Brush Swirl Snare Roll 30 F#0 Castanet 31 G0 Snare L SD Room L 32 G#0 Sticks 33 A0 Bass Drum L BD Room L 34 A#0 Open Rim Shot ...

Page 40

... YMF721 EXTERNAL DIMENSIONS OF PACKAGE 76 100 LEAD THICKNESS : 0.125TYP or 0.15TYP The shape of the molded corner may slightly different from the shape in this diagram. The figure in the parenthesis ( ) should be used as a reference. Plastic body dimensions do not include burr of resin. UNIT : mm Note : LSIs to be installed on the surface of the printed circuit board require special care in storage and soldering. Consult your dealer for the details. 16.00 ± ...

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... YMF721 1. Yamaha reserves the right to make changes to its Products and to this document without notice. The information contained in this document has been carefully checked and is believed to be reliable. However, Yamaha assumes no responsibilities for inaccuracies and makes no commitment to update or to keep current the information contained in this document. ...

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