STM32F050K4 STMicroelectronics, STM32F050K4 Datasheet - Page 16

• Manufacturer Part Number: STM32F050K4
• Description: Entry-level ARM Cortex-M0 MCU with 16 Kbytes Flash, 48 MHz CPU, motor control and CEC functions
• Manufacturer: STMicroelectronics

Specifications of STM32F050K4

• Voltage Range: 2.0 V to 3.6 V
• Conversion Range: 0 to 3.6V
• Systick Timer: 24-bit downcounter

Functional overview
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TIM16 and TIM17 feature one single channel for input capture/output compare, PWM or
one-pulse mode output.
The TIM16 and TIM17 timers can work together via the Timer Link feature for
synchronization or event chaining.
TIM16, and TIM17 have a complementary output with dead-time generation and
independent DMA request generation
Their counters can be frozen in debug mode.
Independent window watchdog (IWWDG)
The independent window watchdog is based on an 8-bit prescaler and 12-bit downcounter
with user-defined refresh window. It is clocked from an independent 40 kHz internal RC and
as it operates independently from the main clock, it can operate in Stop and Standby
modes. It can be used either as a watchdog to reset the device when a problem occurs, or
as a free running timer for application timeout management. It is hardware or software
configurable through the option bytes. The counter can be frozen in debug mode.
System window watchdog (WWDG)
The system window watchdog is based on a 7-bit downcounter that can be set as free
running. It can be used as a watchdog to reset the device when a problem occurs. It is
clocked from the APB clock (PCLK). It has an early warning interrupt capability and the
counter can be frozen in debug mode.
SysTick timer
This timer is dedicated to real-time operating systems, but could also be used as a standard
down counter. It features:
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Inter-integrated circuit interface (I
The I
mode (up to 100 kbit/s), Fast mode (up to 400 kbit/s) and Fast Mode Plus (up to 1 Mbit/s)
with 20 mA output drive.
It supports 7-bit and 10-bit addressing modes, multiple 7-bit slave addresses (2 addresses,
1 with configurable mask). It also includes programmable analog and digital noise filters.
A 24-bit down counter
Autoreload capability
Maskable system interrupt generation when the counter reaches 0.
Programmable clock source (HCLK or HCLK/8)
2
C interface (I2C1) can operate in multimaster or slave mode. It can support Standard
Doc ID 022717 Rev 2
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C)
STM32F050xx