STM32F407ZG STMicroelectronics, STM32F407ZG Datasheet - Page 161

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STM32F407ZG

Manufacturer Part Number
STM32F407ZG
Description
High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator, Ethernet
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F407ZG

Core
ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
3×12-bit, 2.4 Msps A/d Converters
up to 24 channels and 7.2 MSPS in triple interleaved mode
General-purpose Dma
16-stream DMA controller with FIFOs and burst support
Up To 17 Timers
up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
Rtc
subsecond accuracy, hardware calendar

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STM32F405xx, STM32F407xx
Figure 90. Master clock (MCK) used to drive the external audio DAC
1. I2S_SCK is the I2S serial clock to the external audio DAC (not to be confused with I2S_CK).
Figure 91. Master clock (MCK) not used to drive the external audio DAC
1. I2S_SCK is the I2S serial clock to the external audio DAC (not to be confused with I2S_CK).
I2S_CK
I2SCOM_CK
2,3,4,..,129
/I2SD
I2S controller
for 16-bit stereo
for 32-bit stereo
I2S controller
/8
/4
/I2SD
Doc ID 022152 Rev 2
/(2 x 16)
/(2 x 32)
for 16-bit stereo
for 32-bit stereo
F
F
SAUDIO
SAUDIO
/(2 x 16)
/(2 x 32)
I2S_MCK = 256 × F
I2S_SCK
= 11.2896 MHz for F
= 12.2880 MHz for F
F
F
SAUDIO
SAUDIO
Application block diagrams
(1)
= I2S_MCK/8 for 16-bit stereo
= I2S_MCK/4 for 32-bit stereo
ai16042
I2S_SCK
SAUDIO
SAUDIO
SAUDIO
= 44.1 kHz
(1)
= 48.0 kHz
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