STM8S005K6 STMicroelectronics, STM8S005K6 Datasheet - Page 44

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STM8S005K6

Manufacturer Part Number
STM8S005K6
Description
Value line, 16 MHz STM8S 8-bit MCU, 32 Kbytes Flash, data EEPROM
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8S005K6

Program Memory
32 Kbytes Flash; data retention 20 years at 55 °C after 100 cycles
Data Memory
128 bytes of true data EEPROM; endurance up to 100 k write/erase cycles
Ram
2 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

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Option bytes
8
44/103
Addr.
0x4800
0x4801
0x4802
0x4803
0x4804
0x4805h
0x4806
0x4807
0x4808
0x4809
0x480A
0x480B
Option
name
Read-out
protection
(ROP)
User boot
code(UBC)
Alternate
function
remapping
(AFR)
Miscell.
option
Clock
option
HSE clock
startup
Reserved
Option bytes
Option bytes contain configurations for device hardware features as well as the memory
protection of the device. They are stored in a dedicated block of the memory. Except for the
ROP (read-out protection) byte, each option byte has to be stored twice, in a regular form
(OPTx) and a complemented one (NOPTx) for redundancy.
Option bytes can be modified in ICP mode (via SWIM) by accessing the EEPROM address
shown in the table below.
Option bytes can also be modified ‘on the fly’ by the application in IAP mode, except the ROP
option that can only be modified in ICP mode (via SWIM).
Refer to the STM8S Flash programming manual (PM0051) and STM8 SWIM communication
protocol and debug module user manual (UM0470) for information on SWIM programming
procedures.
Option
byte no.
OPT0
OPT1
NOPT1
OPT2
NOPT2
OPT3
NOPT3
OPT4
NOPT4
OPT5
NOPT5
OPT6
Option bits
7
ROP [7:0]
UBC [7:0]
NUBC [7:0]
AFR7
NAFR7
Reserved
Reserved
Reserved
Reserved
HSECNT [7:0]
NHSECNT [7:0]
Reserved
6
AFR6
NAFR6
Table 11: Option bytes
DocID022186 Rev 2
5
AFR5
NAFR5
4
AFR4
NAFR4
HSI
TRIM
NHSI
TRIM
3
AFR3
NAFR3
LSI_ EN
NLSI_
EN
EXT CLK
NEXT
CLK
2
AFR2
NAFR2
IWDG
_HW
NIWDG
_HW
CKAWU
SEL
NCKA
WUSEL
STM8S005K6 STM8S005C6
1
AFR1
NAFR1
WWDG
_HW
NWWDG
_HW
PRS C1
NPRSC1
0
AFR0
NAFR0
WWDG
_HALT
NWW
G_HALT
PRS C0
NPR
SC0
Factory
default
setting
00h
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h

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