TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 153

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

Configuration
Rev. 3.1 November 1, 2005
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
I2CRST
ETHC0RST
SPIRST
SRAMRST
PCIC1RST
DMA1RST
ACLRST
ATA0RST
DMA0RST
PCICRST
I2SRST
TM0RST
TM1RST
TM2RST
SIO0RST
CYPRST
Mnemonic
I2C Reset
ETHERC0
Reset
SPI Reset
SRAMC Reset Resets the internal SRAM controller.
PCIC1 Reset
DMAC1 Reset Resets the DMAC controller 1.
ACLC Reset
ATA0 Reset
DMAC Reset
PCIC Reset
I2S Reset
TMR0 Reset
TMR1 Reset
TMR2 Reset
SIO0 Reset
CYP Reset
Field Name
Resets the I2C controller.
0 = Normal state
1 = Reset
Resets the ETHER controller 0.
0 = Normal state
1 = Reset
Resets the SPI controller.
0 = Normal state
1 = Reset
0 = Normal state
1 = Reset
Resets the PCI controller 1.
0 = Normal state
1 = Reset
0 = Normal state
1 = Reset
Resets the AC-link controller.
0 = Normal state
1 = Reset
Resets the ATA0 controller.
0 = Normal state
1 = Reset
Resets the DMA controller 0.
0 = Normal state
1 = Reset
Resets the PCI controller 0.
0 = Normal state
1 = Reset
Resets the I2S controller.
0 = Normal state
1 = Reset
Resets the TMR0 controller.
0 = Normal state
1 = Reset
Resets the TMR1 controller.
0 = Normal state
1 = Reset
Resets the TMR2 controller.
0 = Normal state
1 = Reset
Resets the SIO0 controller.
0 = Normal state
1 = Reset
Resets the CYP controller.
0 = Normal state
1 = Reset
Table 7-6 Clock Control Register
7-15
Description
Toshiba RISC Processor
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
Initial
Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read/Write
TX4939
7
7