TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 258

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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Video Port
12.3.4. Data Format
12.3.4.1. ITU.Bt.656 Format
The video data format is in 4:2:2 color sub-sampling, each pair of color-difference samples will be intermixed with two
luminance samples. The format for transmission shall be Cb, Y, Cr, Y. The following is a representation of the data format.
In main memory
12.3.4.2. MPEG2 data
Data:
Byte:
Data:
Byte:
In main memory
Rev. 3.1 November 1, 2005
Byte0
Cb0
Cb1
…………………………………….
Cb358
Cb359
……………………………………..
-
-
MPEG-2 Transport Stream (EN/ISO/IEC 13818-1)
| Syncbyte |
MPEG-2 Transport Stream (ETS 300 421)
| Syncbyte |
-
-
0
0
Transmit Video data can start at any byte address.
Capture Video data must align to dword address.
Transmit video data can start at any byte address.
Capture Video data must align to dword address.
1 2 3 4 -----------------------------185 186 187
1 2 3 4 ------------------------------201 202 203
Byte1
Y0
Y2
Y716
Y718
Byte2
Cr0
Cr1
Cr358
Cr359
187 Data bytes
203 Data bytes
Byte3
Y1
Y3
Y717
Y719
12-6
| Syncbyte |
| Syncbyte |
188
204
189 190 --------------------------
205 206 207 -------------------
187 Data bytes
203 Data bytes
Toshiba RISC Processor
TX4939
12
12

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