TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 351

no-image

TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TX4939XBG-400
Manufacturer:
NSC
Quantity:
872
Part Number:
TX4939XBG-400
Manufacturer:
TOSHIBA
Quantity:
10 440
Part Number:
TX4939XBG-400
Manufacturer:
XILINX
0
Part Number:
TX4939XBG-400
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
DDR
DDR_CTL_07 = 0x8038
DDR_CTL_08 = 0x8040
DDR_CTL_09 = 0x8048
DDR_CTL_10 = 0x8050
DDR_CTL_11 = 0x8058
Rev. 3.1 November 1, 2005
Name
BSTLEN
-
TWR
-
Name
TRRD
-
TPDEX
-
Name
TRC
-
TRAS_MIN
-
Name
TRP
-
TEMRS
-
Name
TMRD
-
TRFC
-
Bits
2:0
7:3
10:8
15:11
Bits
2:0
7:3
10:8
15:10
Bits
4:0
7:5
11:8
15:12
Bits
3:0
7:4
9:8
15:10
Bits
1:0
7:2
12:8
15:13
Default
0x0
-
0x0
-
Default
0x0
-
0x0
-
Default
0x00
-
0x0
-
Default
0x0
-
0x0
-
Default
0x0
-
0x00
-
Range
0x0-0x7
-
0x0-0x7
-
Range
0x0-0x7
-
0x0-0x7
-
Range
0x0-0x1f
-
0x0-0xf
-
Range
0x0-0xf
-
0x0-0x3
-
Range
0x0-0x3
-
0x0-0x1f
-
15-21
Description
Encoded burst length sent to DRAMs during initialization.
Burst length encoding that will be programmed into the DRAMs upon
initialization.
Encoding is as follows:
2 words = 001
4 words = 010
8 words = 011
All other codes are reserved
Reserved
DRAM TWR parameter in cycles.
Write Recovery time in cycles
Reserved
Description
DRAM TRRD parameter in cycles.
Activate to Activate delay for different banks in cycles
Reserved
DRAM TPDEX parameter in cycles.
Power-down exit command period in cycles.
Reserved
Description
DRAM TRC parameter in cycles.
Active to Active command period for the same bank in cycles
Reserved
DRAM TRAS_MIN parameter in cycles.
Minimum Row activate time in cycles
Reserved
Description
DRAM TWR parameter in cycles.
Precharge command time in cycles
Reserved
DRAM TERMS parameter in cycles.
Extended mode register set time in cycles
Reserved
Description
DRAM TMRD parameter in cycles.
Mode register set command time in cycles
Reserved
DRAM TRFC parameter in cycles.
Refresh command time in cycles
Reserved
Toshiba RISC Processor
TX4939
15
15

Related parts for TX4939XBG-400