TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 394

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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PCIC
16.4.3. Class Code, Revision ID Register (PCICCREV)
The Class Code field corresponds to the Class Code Register of the PCI Configuration Space, and the Revision ID field
corresponds to the Revision ID Register of the PCI Configuration Space.
Rev. 3.1 November 1, 2005
Default
Default
NAME
NAME
Bits
31:8
7:0
TYPE
TYPE
Mnemonic
CC
RID
31
15
30
14
Field Name
Class Code
Revision ID
29
13
28
12
Figure 16-16 Class Code, Revision ID Register
Table 16-16 Class Code, Revision ID Register
0x00
R/L
CC
27
11
Description
Class Code (Default: 0x060000)
Classifies the device types. The default is 060000h, which defines the PCI
Controller as a Host bridge device.
Revision ID (Default: 0x01)
Indicates the device revision ID. Please contact our Engineering Department
for the exact value.
26
10
25
9
16-30
24
8
0x0600
R/L
CC
23
7
22
6
21
5
20
Toshiba RISC Processor
4
0x01
RID
R/L
19
3
18
2
17
1
R/W
R/L
R/L
TX4939
16
0
16
16

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